39LF020 查看數據表（PDF） - Silicon Storage Technology

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39LF020

512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit (x8) Multi-Purpose Flash

Silicon Storage Technology 

512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash

SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040

SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040

Data Sheet

ADDRESS AMS-0

CE#

OE#

TOEH

TCE

TOE

WE#

DQ6

Note:

TWO READ CYCLES

AMS = Most significant address

WITH SAME OUTPUTS

AMS = A15 for SST39LF/VF512, A16 for SST39LF/VF010,

A17 for SST39LF/VF020 and A18 for SST39LF/VF040

FIGURE 8: TOGGLE BIT TIMING DIAGRAM

TOES

395 ILL F07.0

SIX-BYTE CODE FOR SECTOR-ERASE

TSE

ADDRESS AMS-0

5555 2AAA

5555

5555

2AAA

SAX

CE#

OE#

WE#

TWP

DQ7-0

AA

55

80

AA

55

30

FIGURE

SW0

SW1

SW2

SW3

SW4

SW5

Note: This device also supports CE# controlled Sector-Erase operation. The WE# and CE# signals are

334 ILL F08.0

interchageable as long as minmum timings are met. (See Table 10)

SAX = Sector Address

AMS = Most significant address

AMS = A15 for SST39LF/VF512, A16 for SST39LF/VF010, A17 for SST39LF/VF020 and A18 for SST39LF/VF040

9: WE# CONTROLLED SECTOR-ERASE TIMING DIAGRAM

©2001 Silicon Storage Technology, Inc.

12

S71150-03-000 6/01 395

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