AM29LV001BB-45RJC 查看數據表（PDF） - Advanced Micro Devices

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AM29LV001BB-45RJC

1 Megabit (128 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory

Advanced Micro Devices 

AC CHARACTERISTICS

Addresses

WE#

OE#

CE#

Data

RESET#

555 for program

2AA for erase

PA for program

SA for sector erase

555 for chip erase

tWC

tAS

tAH

tWH

Data# Polling

PA

tGHEL

tCP

tWS

tCPH

tDS

tDH

tWHWH1 or 2

tRH

A0 for program PD for program

55 for erase

30 for sector erase

10 for chip erase

DQ7# DOUT

Notes:

1. Figure indicates the last two bus cycles of the program or erase command sequence.

2. PA program address, SA = Sector Address, PD = program data, DQ7# = complement of the data written to the device,

DOUT = data written to the device.

Figure 22. Alternate CE# Controlled Write Operation Timings

ERASE AND PROGRAMMING PERFORMANCE

Parameter

Sector Erase Time

Chip Erase Time

Byte Programming Time

Chip Programming Time (Note 3)

Typ (Note 1)

0.7

7

9

1.1

Max (Note 2)

15

300

3.3

Unit

Comments

s

Excludes 00h programming

s

prior to erasure (Note 4)

µs

Excludes system level

s

overhead (Note 5)

Notes:

1. Typical program and erase times assume the following conditions: 25°C, 3.0 V VCC, 1,000,000 cycles. Additionally,

programming typicals assume checkerboard pattern.

2. Under worst case conditions of 90°C, VCC = 2.7 V (3.0 V for -45R), 1,000,000 cycles.

3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes

program faster than the maximum program times listed.

4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See

Table 5 for further information on command definitions.

6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.

September 26, 2002

Am29LV001B

35

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