DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

73S8014RN 查看數據表(PDF) - Teridian Semiconductor Corporation

零件编号
产品描述 (功能)
生产厂家
73S8014RN
TERIDIAN
Teridian Semiconductor Corporation TERIDIAN
73S8014RN Datasheet PDF : 28 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
73S8014RN Data Sheet
DS_8014RN_014
CLKDIV1_from_uC
OFF_interrupt_to_uC
RSTIN_from_uC
I/OUC_to/from_uC
CLKDIV2_from_uC
See
note 5
VDD
VPC
See NOTE 2
100nF
C4
10uF
C5
CMDVCC_from_uC
5V/#V_select_from_uC
See NOTE 3
External_clock_from uC
- OR -
22pF C2
CRYSTAL
Y1
22pF C3
See NOTE 4
1 OFF
2 RSTIN
3 I/OUC
4 VPC
5 CLKDIV2
6 CMDVCC
7 5V3V
8
9
10
GND
XTALIN
XTALOUT
73S8014RN
CLKDIV1
PRES
VCC
CLK
GND
RST
I/O
VDD
20
19
18
17
16
15
14
13
VDDF_ADJ
TEST
12
11
R2
R3
Rext2
VDD
See NOTE 1
R1
Rext1
C6
100nF
NOTES:
47K
1) VDD = 2.7V to 5.5V DC.*
2) VPC = 4.75V(ISO)/4.85V(NDS) to 5.5V DC*
VDD
3) Required if external clock from uP is used.
R4
4) Required if crystal is used.
1K
Y1, C2 and C3 must be removed if external clock is used.
Card detection
5) R1 and R3 are external resistors that adjust the VDD
switch is
normally open
fault voltage. Can be left open.
* Do not begin a NDS card session until VPC > 4.85V and VDD > VTH (VDD fault threshold)
Smart Card Connector
NDS, EMV & ISO7816=1uF
Low ESR (<100mohms) C1
C1 should be placed near the SC
connecter contact
CLK track should be routed
far from RST, I/O, C4 and
C8.
Figure 3: 73S8014RN – Typical Application Schematic
14
Rev. 1.0

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]