73S8014RT 查看數據表（PDF） - Teridian Semiconductor Corporation

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73S8014RT

Smart Card Interface

Teridian Semiconductor Corporation 

DS_8014RT_015

73S8014RT Data Sheet

CLKDIV1_from_uC

OFF_interrupt_to_uC

RSTIN_from_uC

I/OUC_to/from_uC

CLKDIV2_from_uC

See

note 5

VDD

VPC

See NOTE 2

100nF

C4

10uF

C5

CMDVCC%_from_uC

CMDVCC#_from_uC

See NOTE 3

External_clock_from uC

- OR -

22pF C2

CRYSTAL

Y1

22pF C3

See NOTE 4

1 OFF

2 RSTIN

3

4

I/OUC

VPC

5 CLKDIV2

6

7

8

9

10

CMDVCC5

CMDVCC3

GND

XTALIN

XTALOUT

73S8014RT

CLKDIV1

PRES

VCC

CLK

GND

RST

I/O

VDD

20

19

18

17

16

15

14

13

VDDF_ADJ

TEST

12

11

R2

R3

Rext2

VDD

See NOTE 1

R1

Rext1

C6

100nF

47K

NOTES:

1) VDD = 2.7V to 5.5V DC.

2) VPC = 4.75V(ISO) to 5.5V DC

VDD

R4

3) Required if external clock from uP is used.

4) Required if crystal is used.

1K

Y1, C2 and C3 must be removed if external clock is used.

Card detection

switch is

5) R1 and R3 are external resistors that adjust the VDD

normally open

fault voltage. Can be left open.

Smart Card Connector

EMV & ISO7816=1uF

Low ESR (<100mohms) C1

C1 should be placed near the SC

connecter contact

CLK track should be routed

far from RST, I/O, C4 and

C8.

Figure 3: 73S8014RT – Typical Application Schematic

Rev. 1.0

15

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