74AHC595S16-13 查看數據表（PDF） - Diodes Incorporated.
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74AHC595S16-13 Datasheet PDF : 10 Pages
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74AHC595
Functional Description and Timing Diagram
Control
SHCP STCP OE MR
X
X
L
L
X
L
L
X
X
H
L
Input
DS
X
L
H
X
L
H
L
H
Output
Q7S
Qn
L
NC
L
L
L
Z
Q6S
NC
NC
Q6S
QnS
QnS
Function
Low-level asserted on MR clears shift register.
Storage register is unchanged
Empty shift register transferred to storage register
Shift register remains clear;: All Q ouputs in Z state.
HIGH is shifted into first stage of Shift Register Contents of each
register shifted to next register
The content of Q6S has been shifted to Q7S and now appears on
device pin Q7S
Contents of shift register copied to storage register. With output now
in active state the storage resister contents appear on Q outputs.
H=HIGH voltage state
L=LOW voltage state
=LOW to HIGH transition
X= don’t care – high or low (not floating)
NC= No change
Z= high-impedance state
SHCP
DS
STCP
MR
OE
Q0
Q1
Q6
Q7
Q7S
Z-state
Z-state
Z-state
Z-state
74AHC595
Document number: DS35486 Rev. 3 - 2
3 of 10
www.diodes.com
June 2013
© Diodes Incorporated
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