74AVCH4T245 查看數據表（PDF） - NXP Semiconductors.

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74AVCH4T245

4-bit dual supply translating transceiver with configurable voltage translation; 3-state

NXP Semiconductors. 

NXP Semiconductors

74AVCH4T245

4-bit dual supply translating transceiver; 3-state

 200 Mbit/s ( 1.1 V to 3.3 V translation)

 200 Mbit/s ( 1.1 V to 2.5 V translation)

 200 Mbit/s ( 1.1 V to 1.8 V translation)

 150 Mbit/s ( 1.1 V to 1.5 V translation)

 100 Mbit/s ( 1.1 V to 1.2 V translation)

 Suspend mode

 Bus hold on data inputs

 Latch-up performance exceeds 100 mA per JESD 78 Class II

 Inputs accept voltages up to 3.6 V

 IOFF circuitry provides partial Power-down mode operation

 Multiple package options

 Specified from 40 C to +85 C and 40 C to +125 C

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

74AVCH4T245D 40 C to +125 C SO16

plastic small outline package; 16 leads;

body width 3.9 mm

74AVCH4T245PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;

body width 4.4 mm

74AVCH4T245BQ 40 C to +125 C

DHVQFN16 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 16 terminals;

body 2.5  3.5  0.85 mm

74AVCH4T245GU 40 C to +125 C XQFN16

plastic, extremely thin quad flat package; no leads;

16 terminals; body 1.80  2.60  0.50 mm

Version

SOT109-1

SOT403-1

SOT763-1

SOT1161-1

4. Marking

Table 2. Marking codes

Type number

74AVCH4T245D

74AVCH4T245PW

74AVCH4T245BQ

74AVCH4T245GU

Marking code

74AVCH4T245D

CH4T245

H4T245

K4

74AVCH4T245

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 27 September 2011

© NXP B.V. 2011. All rights reserved.

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