74HC74 查看數據表（PDF） - ON Semiconductor
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74HC74 Datasheet PDF : 8 Pages
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TIMING REQUIREMENTS (Input tr = tf = 6.0 ns)
74HC74
Symbol
Parameter
tsu Minimum Setup Time, Data to Clock
(Figure 3)
th
Minimum Hold Time, Clock to Data
(Figure 3)
trec Minimum Recovery Time, Set or Reset Inactive to Clock
(Figure 2)
tw
Minimum Pulse Width, Clock
(Figure 1)
tw
Minimum Pulse Width, Set or Reset
(Figure 2)
tr, tf Maximum Input Rise and Fall Times
(Figures 1, 2, 3)
Guaranteed Limit
VCC
– 55 to
(V)
25_C v 85_C v 125_C Unit
2.0
80
3.0
35
4.5
16
6.0
14
100
120
ns
45
55
20
24
17
20
2.0
3.0
3.0
3.0
ns
3.0
3.0
3.0
3.0
4.5
3.0
3.0
3.0
6.0
3.0
3.0
3.0
2.0
8.0
8.0
8.0
ns
3.0
8.0
8.0
8.0
4.5
8.0
8.0
8.0
6.0
8.0
8.0
8.0
2.0
60
75
90
ns
3.0
25
30
40
4.5
12
15
18
6.0
10
13
15
2.0
60
75
90
ns
3.0
25
30
40
4.5
12
15
18
6.0
10
13
15
2.0
1000
1000
1000
ns
3.0
800
800
800
4.5
500
500
500
6.0
400
400
400
ORDERING INFORMATION
Device
Package
Shipping†
74HC74D
74HC74DG
SOIC−14
SOIC−14
(Pb−Free)
55 Units / Rail
74HC74DR2
SOIC−14
74HC74DR2G
74HC74DTR2
SOIC−14
(Pb−Free)
TSSOP−14*
2500 / Tape & Reel
74HC74DTR2G
TSSOP−14*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
http://onsemi.com
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