74LVT245(2008) 查看數據表（PDF） - NXP Semiconductors.
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74LVT245 Datasheet PDF : 15 Pages
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NXP Semiconductors
74LVT245
3.3 V octal transceiver with direction pin (3-state)
5. Pinning information
5.1 Pinning
DIR 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
74LVT245
20 VCC
19 OE
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
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Fig 3. Pin configuration for SO20 and (T)SSOP20
terminal 1
index area
74LVT245
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND(1)
19 OE
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
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Transparent top view
(1) The die substrate is attached to this pad using a
conductive die attach material. It can not be used as a
supply pin or input.
Fig 4. Pin configuration for DHVQFN20
5.2 Pin description
Table 2.
Symbol
DIR
A0 to A7
GND
B0 to B7
OE
VCC
Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
Description
direction control
data input/output
ground (0 V)
data input/output
output enable input (active LOW)
supply voltage
74LVT245_3
Product data sheet
Rev. 03 — 8 May 2008
© NXP B.V. 2008. All rights reserved.
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