SC87C51ACA44 查看數據表（PDF） - Philips Electronics
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SC87C51ACA44 Datasheet PDF : 22 Pages
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Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
Product specification
80C31/80C51/87C51
AC ELECTRICAL CHARACTERISTICS FOR PHILIPS DEVICES
Tamb = 0°C to +70°C, VCC = 5V ±20%, VSS = 0V (PCB80C31/51, PCF80C31/51)1, 2, 4, 5
VARIABLE CLOCK3
SYMBOL FIGURE
PARAMETER
MIN
MAX
UNIT
1/tCLCL
Oscillator frequency: Speed Versions
PCB8031/51
–2
PCA/PCB/PCF80C31/51 –3
PCB/PCF80C31/51
–4
PCB/FB80C31/51
–5
0.5
12
MHz
1.2
16
MHz
1.2
24
MHz
1.2
33
MHz
tLHLL
1
tAVLL
1
tLLAX
1
tLLIV
1
tLLPL
1
tPLPH
1
tPLIV
1
tPXIX
1
tPXIZ
1
tAVIV
1
tPLAZ
1
Data Memory
ALE pulse width
Address valid to ALE low
Address hold after ALE low
ALE low to valid instruction in
ALE low to PSEN low
PSEN pulse width
PSEN low to valid instruction in
Input instruction hold after PSEN
Input instruction float after PSEN
Address to valid instruction in
PSEN low to address float
2tCLCL–40
ns
tCLCL–25
ns
tCLCL–25
ns
4tCLCL–65
ns
tCLCL–25
ns
3tCLCL–45
ns
3tCLCL–60
ns
0
ns
tCLCL–25
ns
5tCLCL–80
ns
10
ns
tRLRH
2, 3
tWLWH
2, 3
tRLDV
2, 3
tRHDX
2, 3
tRHDZ
2, 3
tLLDV
2, 3
tAVDV
2, 3
tLLWL
2, 3
tAVWL
2, 3
tQVWX
2, 3
tWHQX
2, 3
tRLAZ
2, 3
tWHLH
2, 3
External Clock
RD pulse width
WR pulse width
RD low to valid data in
Data hold after RD
Data float after RD
ALE low to valid data in
Address to valid data in
ALE low to RD or WR low
Address valid to WR low or RD low
Data valid to WR transition
Data hold after WR
RD low to address float
RD or WR high to ALE high
6tCLCL–100
ns
6tCLCL–100
ns
5tCLCL–90
ns
0
ns
2tCLCL–28
ns
8tCLCL–150
ns
9tCLCL–165
ns
3tCLCL–50
3tCLCL+50
ns
4tCLCL–75
ns
tCLCL–30
ns
tCLCL–25
ns
0
ns
tCLCL–25
tCLCL+25
ns
tCHCX
5
High time
15
ns
tCLCX
5
Low time
15
ns
tCLCH
5
Rise time
20
ns
tCHCL
5
Fall time
20
ns
NOTES:
1. Parameters are valid over operating temperature range unless otherwise specified.
2. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF.
3. For all Philips speed versions only.
4. Interfacing the 80C31/51 to devices with float times up to 30ns is permitted. This limited bus contention will not cause damage to port 0
drivers.
5. VCC = 5V ±10% for 33MHz.
1996 Aug 16
3-15
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