Timing Waveforms for Data Polling (During Embedded Algorithms)
tRC
Addresses
VA
VA
tACC
CE
tCE
tCH
OE
WE
tOEH
tOE
tDF
tOH
I/O7
Complement
Complement True
A29L040 Series
VA
Valid Data
High-Z
I/O0 - I/O6
Status Data
Status Data True
Valid Data
High-Z
Note : VA = Valid Address. Illustation shows first status cycle after command sequence, last status read cycle, and array data
read cycle.
Timing Waveforms for Toggle Bit (During Embedded Algorithms)
tRC
Addresses
VA
VA
tACC
CE
tCE
tCH
OE
WE
tOEH
tOE
tDF
tOH
I/O6 , I/O2
Valid Status
(first read)
Valid Status
(second read)
VA
Valid Status
(stop togging)
VA
Valid Status
Note: VA = Valid Address; not required for I/O6. Illustration shows first two status cycle after command sequence, last status
read cycle, and array data read cycle.
(September, 2011, Version 1.6)
19
AMIC Technology, Corp.