A32200DX-PG208B 查看數據表（PDF） - Actel Corporation

零件编号

产品描述 (功能)

生产厂家

A32200DX-PG208B

HiRel FPGAs

Actel Corporation 

3200DX Timing Model (SRAM Functions)*

Input Delays

I/O Module

tINPY = 1.9 ns tIRD1 = 2.2 ns

DQ

G

tINSU = 0.7 ns

tINH = 0.0 ns

tINGO = 4.0 ns

ARRAY

CLOCKS

FMAX = 140 MHz

WD [7:0]

WRAD [5:0]

BLKEN

WEN

WCLK

tADSU = 2.1 ns

tADH = 0.0 ns

tWENSU = 3.5 ns

tBENS = 3.6 ns

RD [7:0]

RDAD [5:0]

REN

RCLK

tADSU = 2.1 ns

tADH = 0.0 ns

tRENSU = 0.8 ns

tRCO = 4.4 ns

Predicted

Routing

Delays

tRD1 = 1.3 ns

*Values shown for A32100DX–1 at worst-case military conditions.

I/O Module

tDLH = 6.3 ns

DQ

G

tGHL = 12.4 ns

tLSU = 0.4 ns

tLH = 0.0 ns

16

Share Link: