3967 查看數據表（PDF） - Allegro MicroSystems

零件编号

产品描述 (功能)

生产厂家

3967

Microstepping Driver with Translator

Allegro MicroSystems 

A3967

Microstepping Driver with Translator

Functional Description (cont’d)

RC Blanking. In addition to the fixed off-time of the

PWM control circuit, the CT component sets the compara-

tor blanking time. This function blanks the output of the

current-sense comparator when the outputs are switched by

the internal current-control circuitry. The comparator out-

put is blanked to prevent false overcurrent detection due

to reverse recovery currents of the clamp diodes, and/or

switching transients related to the capacitance of the load.

The blank time tBLANK can be approximated by:

tBLANK = 1400CT

Enable Input (ENABLE). This active-low input enables

all of the outputs. When logic high the outputs are dis-

abled. Inputs to the translator (STEP, DIRECTION, MS1,

MS2) are all active independent of the ENABLE input

state.

Shutdown. In the event of a fault (excessive junction

temperature) the outputs of the device are disabled until

the fault condition is removed. At power up, and in the

event of low VCC, the under-voltage lockout (UVLO)

circuit disables the drivers and resets the translator to the

home state.

Sleep Mode (SLEEP). An active-low control input used

to minimize power consumption when not in use. This dis-

ables much of the internal circuitry including the outputs.

A logic high allows normal operation and startup of the

device in the home position.

Percent Fast Decay Input (PFD). When a STEP input

signal commands a lower output current from the previous

step, it switches the output current decay to either slow-,

fast-, or mixed-decay depending on the voltage level at the

PFD input. If the voltage at the PFD input is greater than

0.6VCC then slow-decay mode is selected. If the voltage on

the PFD input is less than 0.21VCC then fast-decay mode is

selected. Mixed decay is between these two levels.

Mixed Decay Operation. If the voltage on the PFD in-

put is between 0.6VCC and 0.21VCC, the bridge will oper-

ate in mixed-decay mode depending on the step sequence

(see figures). As the trip point is reached, the device will

go into fast-decay mode until the voltage on the RC termi-

nal decays to the voltage applied to the PFD terminal. The

time that the device operates in fast decay is approximated

by:

tFD = RTCTIn (0.6VCC/VPFD)

After this fast decay portion, tFD, the device will

switch to slow-decay mode for the remainder of the fixed

off-time period.

2.5

TA = +25°C

2.0

SOURCE DRIVER

1.5

Typical output saturation voltages show-

ing Satlington sink-driver operation.

1.0

0.5

SINK DRIVER

0

200

300

400

500

600

700

OUTPUT CURRENT IN MILLIAMPERES

Dwg. GP-064-1A

Allegro MicroSystems, Inc.

6

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

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