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A3977SLP 查看數據表(PDF) - Allegro MicroSystems

零件编号
产品描述 (功能)
生产厂家
A3977SLP
Allegro
Allegro MicroSystems Allegro
A3977SLP Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
3977
MICROSTEPPING DMOS DRIVER
WITH TRANSLATOR
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 35 V, VDD = 3.0 V to 5.5V (unless otherwise
noted)
Limits
Characteristic
Symbol Test Conditions
Min. Typ. Max. Units
Output Drivers
Load Supply Voltage Range
VBB Operating
During sleep mode
8.0
35
V
0
35
V
Output Leakage Current
IDSS VOUT = VBB
VOUT = 0 V
Output On Resistance
rDS(on) Source driver, IOUT = -2.5 A
Sink driver, IOUT = 2.5 A
Body Diode Forward Voltage VF Source diode, IF = -2.5 A
Sink diode, IF = 2.5 A
Motor Supply Current
IBB fPWM < 50 kHz
Operating, outputs disabled
<1.0
20
µA
<1.0
-20
µA
0.45 0.57
0.36 0.43
1.4
V
1.4
V
8.0
mA
6.0
mA
Sleep mode
20
µA
Control Logic
Logic Supply Voltage Range
Logic Input Voltage
Logic Input Current
Maximum STEP Frequency
HOME Output Voltage
Blank Time
Fixed Off Time
VDD
VIN(1)
VIN(0)
IIN(1)
IIN(0)
fSTEP
VOH
VOL
tBLANK
toff
Operating
VIN = 0.7VDD
VIN = 0.3VDD
IOH = -200 µA
IOL = 200 µA
Rt = 56 k, Ct = 680 pF
Rt = 56 k, Ct = 680 pF
3.0
0.7VDD
-20
-20
500*
0.7VDD
700
30
5.0
5.5
V
V
0.3VDD
V
<1.0
20
µA
<1.0
20
µA
kHz
V
0.3VDD
V
950 1200
ns
38
46
µs
continued next page …
4
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