A3987 查看數據表（PDF） - Allegro MicroSystems
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产品描述 (功能)
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A3987 Datasheet PDF : 13 Pages
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A3987
DMOS Microstepping Driver with Translator
Functional Block Diagram
VDD
To VDD
ROSC
OSC
To VDD
STEP
DIR
SLEEP/RESET
MS1
MS2
ENABLE
Translator
REF
Buffer
VREG
0.22 µF
Regulator
0.1 µF
CP1
CP2
Charge
Pump
VCP
0.1 µF
DAC
PWM Latch
Blanking
Mixed Decay
VREG VCP
DMOS Full Bridge 1
Control
Logic
Gate
Drive
OCP
DMOS Full Bridge 2
PWM Latch
Blanking
Mixed Decay
DAC
VBB1
OUT1A
OUT1B
SENSE1
VBB2
OUT2A
OUT2B
SENSE2
GND
GND
Allegro MicroSystems, Inc.
3
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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