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ACPL-332J 查看數據表(PDF) - Avago Technologies

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ACPL-332J Datasheet PDF : 24 Pages
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+_ 0.1µF
RF
CF
R
+_
1 VS
2 VCC1
3 FAULT
4 VS
5 CATHODE
6 ANODE
7 ANODE
8 CATHODE
VE 16
VLED 15
0.1µF 0.1µF
DESAT 14
CBLANK
100
DDESAT
VCC2 13
VEE 12
VOUT 11
VCLAMP 10
VEE 9
RG
+_
Q1
RPULL-DOWN
Q2
Figure 36. Recommended application circuit (Single Supply) with desaturation detection and active Miller Clamp
+ HVDC
+
VCE
-
3-PHASE
AC
+
VCE
-
- HVDC
Description of Operation
Normal Operation
During normal operation, VOUT of the ACPL-332J is con-
trolled by input LED current IF (pins 5, 6, 7 and 8), with
the IGBT collector-to-emitter voltage being monitored
through DDESAT. The FAULT output is high. See Figure 37.
Fault Condition
The DESAT pin monitors the IGBT Vce voltage. When the
voltage on the DESAT pin exceeds 6.5 V while the IGBT is
on, VOUT is slowly brought low in order to “softly” turn-off
the IGBT and prevent large di/dt induced voltages. Also
activated is an internal feedback channel which brings
the FAULT output low for the purpose of notifying the
micro-controller of the fault condition.
Fault Reset
Once fault is detected, the output will be muted for 5 µs
(minimum). All input LED signals will be ignored during
the mute period to allow the driver to completely soft
shut-down the IGBT. The fault mechanism can be reset by
the next LED turn-on after the 5us (minimum) mute time.
See Figure 37.
IF
tDESAT(LOW)
6.5V
VDESAT
50%
VOUT
tBLANK
tDESAT(10%)
90%
tDESAT(90%)
10%
FAULT
50%
tDESAT(FAULT)
tDESAT(MUTE))
Figure 37. Fault Timing diagram
Reset done
during the
next LED
turn-on
tRESET(FAULT)
50%
20

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