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AD13280AF(Rev0) 查看數據表(PDF) - Analog Devices

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AD13280AF Datasheet PDF : 20 Pages
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AD13280
AMP-IN-X-1
AMP-IN-X-2
100
100
TO AD8037
Figure 2. Single-Ended Input Stage
AVCC AVCC
ENCODE
10k
10k
LOADS
AVCC
AVCC
10k
10k
ENCODE
LOADS
Figure 3. ENCODE Inputs
DVCC
CURRENT MIRROR
VREF
DVCC
DR OUT
CURRENT MIRROR
Figure 4. Digital Output Stage
DVCC
CURRENT MIRROR
THEORY OF OPERATION
The AD13280 is a high-dynamic range 12-bit, 80 MHz pipeline
delay (three pipelines) analog-to-digital converter. The custom
analog input section provides input ranges of 1 V and 2 V p-p
and input impedance configurations of 50 , 100 , and 200 .
The AD13280 employs four monolithic ADI components per
channel (AD8037, AD8138, AD8031, and a custom ADC IC),
along with multiple passive resistor networks and decoupling
capacitors to fully integrate a complete 12-bit analog-to-digital
converter.
In the single-ended input configuration the input signal is passed
through a precision laser trimmed resistor divider allowing
the user to externally select operation with a full-scale signal of
± 0.5 V, or ± 1.0 V by choosing the proper input terminal for the
application. The result of the resistor divider is to apply a full-
scale input approximately 0.4 V to the noninverting input of the
internal AD8037 amplifier.
The AD13280 analog input includes an AD8037 amplifier featur-
ing an innovative architecture that maximizes the dynamic range
capability on the amplifiers’ inputs and outputs. The AD8037
amplifier provides a high input impedance and gain for driving
the AD8138 in a single-ended to differential amplifier configura-
tion. The AD8138 has a –3 dB bandwidth at 300 MHz and
delivers a differential signal with the lowest harmonic distortion
available in a differential amplifier. The AD8138 differential
outputs help balance the differential inputs to the custom ADC
maximizing the performance of the device.
The AD8031 provides the buffer for the internal reference analog-
to-digital converter. The internal reference voltage of the custom
ADC is designed to track the offsets and drifts and is used to
ensure matching over an extended temperature range of operation.
The reference voltage is connected to the output common-mode
input on the AD8138. This reference voltage sets the output
common mode on the AD8138 at 2.4 V, which is the midsupply
level for the ADC.
The custom ADC has complementary analog input pins, AIN
and AIN. Each analog input is centered at 2.4 V and should
swing ±0.55 V around this reference. Since AIN and AIN are
180 degrees out of phase, the differential analog input signal is
2.2 V peak-to-peak. Both analog inputs are buffered prior to the
first track-and-hold.
The custom ADC digital outputs drive 100 series resistors (Fig-
ure 5). The result is a 12-bit parallel digital CMOS-compatible
word, coded as two’s complement.
VREF
DVCC
100
D0D11
CURRENT MIRROR
REV. 0
Figure 5. Digital Output Stage
USING THE SINGLE-ENDED INPUT
The AD13280 has been designed with the user’s ease of opera-
tion in mind. Multiple input configurations have been included
on-board to allow the user a choice of input signal levels and
input impedance. The standard inputs are ± 0.5 V and 1.0 V.
The user can select the input impedance of the AD13280 on any
input by using the other inputs as alternate locations for the
GND. The following chart summarizes the impedance options
available at each input location.
AMP-IN-X-1 = 100 when AMP-IN-X-2 is open.
AMP-IN-X-1 = 50 when AMP-IN-X-2 is shorted to GND.
AMP-IN-X-2 = 200 when AMP-IN-X-1 is open.
Each channel has two analog inputs AMP-IN-A-1 and AMP-
IN-A-2 or AMP-IN-B-1 and AMP-IN-B-2. Use AMP-IN-A-1
–9–

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