AD1849KP 查看數據表（PDF） - Analog Devices
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AD1849KP Datasheet PDF : 28 Pages
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Digital Signals
Pin Name
SDRX
SDTX
SCLK
FSYNC
TSOUT
TSIN
D/C
CIN1
COUT1
CIN2
COUT2
CLKIN
CLKOUT
PDN
RESET
PIO1
PIO0
Analog Signals
Pin Name PLCC
LINL
18
LINR
16
MINL
17
MINR
15
LOUT0L
32
LOUT0R
33
LOUT1L
31
LOUT1R
29
LOUT1C
30
MOUT
27
MOUTR
28
C0
14
C1
20
N/C
26
N/C
34
VREF
21
CMOUT
19
Power Supplies
Pin Name
VCC
GNDA
VDD
GNDD
PLCC
1
44
43
42
41
40
35
6
7
10
11
4
5
13
12
37
36
AD1849K
PIN FUNCTION DESCRIPTIONS
I/O
Description
I
Receive Serial Data Pin
O
Transmit Serial Data Pin
I/O
Bidirectional Serial Bit Clock
O
Frame Sync Output Signal
O
Chaining Word Output
I
Chaining Word Input
I
Data/Control Select Input
I
Crystal 1 Input
O
Crystal 1 Output
I
Crystal 2 Input
O
Crystal 2 Output
I
External Sample Clock Input (256 × FS)
O
External Sample Clock Output (256 × FS)
I
Power Down Input (Active HI)
I
Reset Input (Active LO)
I/O
Parallel Input/Output Bit 1
I/O
Parallel Input/Output Bit 0
I/O Description
I
Left Channel Line Input
I
Right Channel Line Input
I
Left Channel Microphone Input (–20 dB from Line Level if MB = 0 or Line Level if MB = 1)
I
Right Channel Microphone Input (–20 dB from Line Level if MB = 0 or Line Level if MB = 1)
O Left Channel Line Output 0
O Right Channel Line Output 0
O Left Channel Line Output 1
O Right Channel Line Output 1
I
Common Return Path for Large Current from External Headphones
O Mono Speaker Output
I
Mono Speaker Output Return
O External 1.0 µF Capacitor (± 10%) Connection
O External 1.0 µF Capacitor (± 10%) Connection
No Connect (Do Not Connect)
No Connect (Do Not Connect)
O Voltage Reference (Connect to Bypass Capacitor)
O Common Mode Reference Datum Output (Nominally 2.25 V)
PLCC
I/O
23 and 24
I
22 and 25
I
3, 8, 38
I
2, 9, 39
I
Description
Analog Supply Voltage (5 V)
Analog Ground
Digital Supply Voltage (5 V)
Digital Ground
REV. A
–7–
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