AD5241BRUZ10-R7 查看數據表（PDF） - Analog Devices
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AD5241BRUZ10-R7 Datasheet PDF : 20 Pages
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AD5241/AD5242
ORDERING GUIDE
Model1, 2
AD5241BR10
AD5241BR10-REEL7
AD5241BRZ10
AD5241BRZ10-RL7
AD5241BRU10
AD5241BRU10-REEL7
AD5241BRUZ10
AD5241BRUZ10-R7
AD5241BR100
AD5241BR100-REEL7
AD5241BRZ100
AD5241BRZ100-RL7
AD5241BRU100
AD5241BRU100-REEL7
AD5241BRUZ100
AD5241BRUZ100-R7
AD5241BR1M
AD5241BRZ1M
AD5241BRZ1M-REEL
AD5241BRU1M
AD5241BRU1M-REEL7
AD5241BRUZ1M
AD5241BRUZ1M-R7
AD5242BR10
AD5242BR10-REEL7
AD5242BRZ10
AD5242BRZ10-REEL7
AD5242BRU10
AD5242BRU10-REEL7
AD5242BRUZ10
AD5242BRUZ10-RL7
AD5242BR100
AD5242BR100-REEL7
AD5242BRZ100
AD5242BRZ100-REEL7
AD5242BRU100
AD5242BRU100-REEL7
AD5242BRUZ100
AD5242BRUZ100-RL7
AD5242BR1M
AD5242BRZ1M
AD5242BRU1M
AD5242BRU1M-REEL7
AD5242BRUZ1M
AD5242BRUZ1M-REEL7
EVAL-AD5242EBZ
No. of Channels
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
End-to-End RAB
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
100 kΩ
100 kΩ
100 kΩ
100 kΩ
100 kΩ
100 kΩ
100 kΩ
100 kΩ
1 MΩ
1 MΩ
1 MΩ
1 MΩ
1 MΩ
1 MΩ
1 MΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
100 kΩ
100 kΩ
100 kΩ
100 kΩ
100 kΩ
100 kΩ
100 kΩ
100 kΩ
1 MΩ
1 MΩ
1 MΩ
1 MΩ
1 MΩ
1 MΩ
Evaluation Board
Temperature Range
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
Package Description
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead TSSOP
14-Lead TSSOP
14-Lead TSSOP
14-Lead TSSOP
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead TSSOP
14-Lead TSSOP
14-Lead TSSOP
14-Lead TSSOP
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead TSSOP
14-Lead TSSOP
14-Lead TSSOP
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
Package Option
R-14
R-14
R-14
R-14
RU-14
RU-14
RU-14
RU-14
R-14
R-14
R-14
R-14
RU-14
RU-14
RU-14
RU-14
R-14
R-14
R-14
R-14
RU-14
RU-14
RU-14
R-16
R-16
R-16
R-16
RU-16
RU-16
RU-16
RU-16
R-16
R-16
R-16
R-16
RU-16
RU-16
RU-16
RU-16
R-16
R-16
R-16
RU-16
RU-16
RU-16
1 The AD5241/AD5242 die size is 69 mil × 78 mil, 5,382 sq. mil. Contains 386 transistors for each channel. Patent Number 5,495,245 applies.
2 Z = RoHS Compliant Part.
Rev. C | Page 18 of 20
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