AD5248 查看數據表（PDF） - Analog Devices

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AD5248

Dual, 256-Position, I2C-Compatible Digital Potentiometers

Analog Devices 

AD5243/AD5248

Data Sheet

I2C CONTROLLER PROGRAMMING

Write Bit Patterns

1

91

91

9

SCL

SDA

START BY

MASTER

01 0111

FRAME 1

SLAVE ADDRESS BYTE

1 R/W

A0 SD X X X X X

ACK BY

AD5243

FRAME 2

INSTRUCTION BYTE

X

D7 D6 D5 D4 D3 D2 D1 D0

ACK BY

AD5243

FRAME 3

DATA BYTE

ACK BY

AD5243

STOP BY

MASTER

Figure 45. Writing to the RDAC Register—AD5243

SCL

SDA

START BY

MASTER

1

91

91

9

0 1 0 1 1 AD1 AD0 R/W

A0 SD X X X X X

FRAME 1

SLAVE ADDRESS BYTE

ACK BY

AD5248

FRAME 2

INSTRUCTION BYTE

X

D7 D6 D5 D4 D3 D2 D1 D0

ACK BY

AD5248

FRAME 3

DATA BYTE

ACK BY

AD5248

STOP BY

MASTER

Figure 46. Writing to the RDAC Register—AD5248

Read Bit Patterns

1

91

9

SCL

SDA

START BY

MASTER

010111

FRAME 1

SLAVE ADDRESS BYTE

1 R/W

D7 D6 D5 D4 D3 D2 D1 D0

ACK BY

AD5243

FRAME 2

RDAC REGISTER

NO ACK

BY MASTER

STOP BY

MASTER

Figure 47. Reading Data from a Previously Selected RDAC Register in Write Mode—AD5243

1

91

9

SCL

SDA

START BY

MASTER

0 1 0 1 1 AD1 AD0 R/W

D7 D6 D5 D4 D3 D2 D1 D0

ACK BY

AD5248

NO ACK

BY MASTER

FRAME 1

SLAVE ADDRESS BYTE

FRAME 2

RDAC REGISTER

STOP BY

MASTER

Figure 48. Reading Data from a Previously Selected RDAC Register in Write Mode—AD5248

Multiple Devices on One Bus (Applies Only to AD5248)

Figure 49 shows four AD5248 devices on the same serial bus.

Each has a different slave address because the states of their

AD0 and AD1 pins are different. This allows each device on the

bus to be written to or read from independently. The master

device output bus line drivers are open-drain pull-downs in a

fully I2C-compatible interface.

MASTER

RP RP

5V

5V

5V

SDA

SCL

5V

SDA SCL

AD1

AD0

SDA SCL

AD1

AD0

SDA SCL

AD1

AD0

SDA SCL

AD1

AD0

AD5248

AD5248

AD5248

AD5248

Figure 49. Multiple AD5248 Devices on One I2C Bus

Rev. B | Page 18 of 20

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