AD5678BRUZ-2REEL7 查看數據表（PDF） - Analog Devices

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AD5678BRUZ-2REEL7

4 × 12-Bit and 4 × 16-Bit Octal DAC with On-Chip Reference in 14-Lead TSSOP

Analog Devices 

8

TA = 25°C

7

6

5

4

3

VDD = 5V

2

1

0

VDD = 3V

0

1

2

3

4

5

6

VLOGIC (V)

Figure 29. Supply Current vs. Logic Input Voltage

VDD

1

AD5678

VDD = VREF = 5V

TA = 25°C

2

VOUT

CH1 2.0V CH2 1.0V

M100μs 125MS/s 8.0ns/pt

A CH1 1.28V

Figure 32. Power-On Reset to Midscale

VDD = VREF = 5V

TA = 25°C

FULL-SCALE CODE CHANGE

0x0000 TO 0xFFFF

OUTPUT LOADED WITH 2kΩ

AND 200pF TO GND

VOUT = 909mV/DIV

1

TIME BASE = 4μs/DIV

Figure 30. Full-Scale Settling Time, 5 V

SYNC

1

SLCK

3

VOUT

VDD = 5V

2

CH1 5.0V CH2 500mV M400ns

CH3 5.0V

A CH1 1.4V

Figure 33. Exiting Power-Down to Midscale

VDD = VREF = 5V

TA = 25°C

VDD

1

2

VOUT

MAX(C2)*

420.0mV

CH1 2.0V

CH2 500mV

M100μs 125MS/s

A CH1 1.28V

Figure 31. Power-On Reset to 0 V

8.0ns/pt

2.505

2.504

2.503

2.502

2.501

2.500

2.499

2.498

2.497

2.496

2.495

2.494

2.493

2.492

2.491

2.490

2.489

2.488

2.487

2.486

2.485

0

VDD = 5V

VREFOUT = 2.5V

TA = 25°C

4ns/SAMPLE NUMBER

GLITCH IMPULSE = 3.55nV-s

1 LSB CHANGE AROUND

MIDSCALE (0x8000 TO 0x7FFF)

64 128 192 256 320 384 448 512

SAMPLE

Figure 34. Digital-to-Analog Glitch Impulse (Negative)

Rev. C | Page 15 of 28

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