AD624CDZ 查看數據表（PDF） - Analog Devices
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AD624CDZ Datasheet PDF : 17 Pages
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AD624
+INPUT
(–INPUT)
50⍀
G = 100
G = 200
G = 500
RG1
RG2
–INPUT
(+INPUT)
225.3⍀
4445.7⍀
124⍀
80.2⍀
AD624
VB
10k⍀
20k⍀ 10k⍀
50⍀
20k⍀ 10k⍀
10k⍀
+VS
DAC A
1/2
AD712
DATA
INPUTS
CS
WR
DAC A/DAC B
DB0
DB7
AD7528
DAC B
256:1
1/2
AD712
VOUT
Figure 40. Programmable Output Gain Using a DAC
AUTOZERO CIRCUITS
In many applications it is necessary to provide very accurate
data in high gain configurations. At room temperature the offset
effects can be nulled by the use of offset trimpots. Over the
operating temperature range, however, offset nulling becomes a
problem. The circuit of Figure 41 shows a CMOS DAC operat-
ing in the bipolar mode and connected to the reference terminal
to provide software controllable offset adjustments.
–INPUT
RG1
G = 100
G = 200
G = 500
RG2
+INPUT
39k⍀
–VS
AD589
+VS
AD624
–VS
+VS
MSB
DATA
INPUTS LSB
CS
WR
RFB
OUT1
AD7524
OUT2
VOUT
VREF
R3
20k⍀
C1
+VS R4
10k⍀
1/2
AD712
R6
5k⍀
GND
R5
20k⍀
1/2
AD712
–VS
Figure 41. Software Controllable Offset
In many applications complex software algorithms for autozero
applications are not available. For these applications Figure 42
provides a hardware solution.
15 16
14
13
RG1
RG2
+VS
AD624
–VS
0.1F LOW
LEAKAGE
9 10
AD542
1k⍀
12 11
VOUT
CH
VDD
VSS
GND
200s
ZERO PULSE
AD7510DIKD
A1 A2
A3
A4
Figure 42. Autozero Circuit
The microprocessor controlled data acquisition system shown in
Figure 43 includes includes both autozero and autogain capabil-
ity. By dedicating two of the differential inputs, one to ground
and one to the A/D reference, the proper program calibration
cycles can eliminate both initial accuracy errors and accuracy
errors over temperature. The autozero cycle, in this application,
converts a number that appears to be ground and then writes
that same number (8 bit) to the AD624 which eliminates the
zero error since its output has an inverted scale. The autogain
cycle converts the A/D reference and compares it with full scale.
A multiplicative correction factor is then computed and applied
to subsequent readings.
RG2
AD7507
AD624
RG1
A0 A2
EN A1
20k⍀
VREF
AD583
VIN AD574A
AGND
20k⍀
–VREF
LATCH
1/2
AD712
10k⍀
1/2
5k⍀ AD712
AD7524
DECODE
CONTROL
ADDRESS BUS
MICRO-
PROCESSOR
Figure 43. Microprocessor Controlled Data Acquisition
System
–12–
REV. C
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