AD7877(RevA) 查看數據表（PDF） - Analog Devices
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AD7877 Datasheet PDF : 44 Pages
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Table 6. Codes for Selecting Input Channel and Normal or Ratiometric Conversion
Channel SER/DFR CHADD(3:0)
Analog Input
X Switches
Y Switches
0
0
0000
X+ (Y Position)
OFF
ON
1
0
0001
Y+ (X Position)
ON
OFF
2
0
0010
Y− (Z2)
X+ OFF, X− ON
Y+ ON, Y− OFF
3
0
0 01 1
AUX1
OFF
OFF
4
0
0 1 00
AUX2
OFF
OFF
5
0
0101
AUX3
OFF
OFF
6
0
0110
BAT1
OFF
OFF
7
0
0111
BAT2
OFF
OFF
8
0
1000
TEMP1
OFF
OFF
9
0
1001
TEMP2
OFF
OFF
10
0
1010
X+ (Z1)
X+ OFF, X− ON
Y+ ON, Y− OFF
-
0
1011
INVALID ADDRESS
-
0
1100
INVALID ADDRESS
-
0
1101
INVALID ADDRESS
-
0
1110
INVALID ADDRESS
-
0
1111
INVALID ADDRESS
0
1
0000
X+ (Y Position)
OFF
ON
1
1
0001
Y+ (X Position)
ON
OFF
2
1
0010
Y− (Z2)
X+ OFF, X− ON
Y+ ON, Y− OFF
3
1
0011
AUX1
OFF
OFF
4
1
0100
AUX2
OFF
OFF
5
1
0101
AUX3
OFF
OFF
6
1
0110
BAT1
OFF
OFF
7
1
0111
BAT2
OFF
OFF
8
1
1000
TEMP1
OFF
OFF
9
1
1001
TEMP2
OFF
OFF
10
1
1010
X+ (Z1)
X+ OFF, X− ON
Y+ ON, Y− OFF
-
1
10 1 1
INVALID ADDRESS
-
1
1100
INVALID ADDRESS
-
1
1101
INVALID ADDRESS
-
1
1110
INVALID ADDRESS
-
1
1111
INVALID ADDRESS
AD7877
+REF
Y+
X+
Y+
VREF
VREF
VREF
VREF
VREF
VREF
VREF
Y+
−REF
Y−
X−
X−
GND
GND
GND
GND
GND
GND
GND
X−
VREF
GND
VREF
GND
VREF
GND
VREF
GND
VREF
GND
VREF
GND
VREF
GND
VREF
GND
VREF
GND
VREF
GND
VREF
GND
CONTROL REGISTER 2
Timer (Control Register 2 Bits <1:0>)
The TMR bits in Control Register 2 enable the ADC to
repeatedly perform a conversion or conversion sequence either
once only or at intervals of 512 µs, 1.024 ms, or 8.19 ms. In slave
mode, the timer starts as soon as the conversion sequence is
finished. In master mode, the timer starts at the end of a conver-
sion sequence only if the screen remains touched. If the touch is
released at any stage, then the timer stops and, the next time the
screen is touched, a conversion sequence begins immediately.
Table 7. Control Register 2 Timer Selection
TMR1
TMR0
Function
0
0
Convert only once (default)
0
1
Every 1024 clocks (512 µs)
1
0
Every 2048 clocks (1.024 ms)
1
1
Every 16,384 clocks (8.19 ms)
Int/Ext Reference (Control Register 2 Bit <2>)
If the REF bit in Control Register 2 is 0 (default value), the
internal reference is selected. If any connection is made to VREF
while the internal reference is selected (for example, to supply a
reference to other circuits), it should be buffered. An external
power supply should not be connected to this pin while REF is
equal to 0, because it might overdrive the internal reference.
Note also that, because the internal reference is 2.5 V, it operates
only with supply voltages down to 2.7 V. Below this value an
external reference should be used.
If the REF bit is 1, the VREF pin becomes an input and the
internal reference is powered down. This overrides any setting
of the PM bits with regard to the reference. An external
reference can then be applied to the REF pin.
Rev. A | Page 21 of 44
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