AD8159
LOOPBACK
The AD8159 also supports port level loopback, as is shown in
Figure 34. The loopback control pins override the lane select
(SEL[3:0]) and bicast control (BICAST) pins. Table 7 summarizes
the different loopback configurations.
Data Sheet
IOx_C[3:0]
X4
1:2 DEMUX
PORT C LOOPBACK
OIx_C[3.0]
X4
2:1 MUX
X4
Ox_A[3:0]
X4
Ox_B[3:0]
PORT A LOOPBACK
PORT B LOOPBACK
X4
Ix_A[3:0]
X4
Ix_B[3:0]
Figure 34. Port-Based Loopback Capability
Table 7. Loopback, Bicast, and Port Select Settings1
LB_A
LB_B
LB_C
SELx
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
1
0
0
0
1
X2
0
0
1
1
0
1
0
0
0
1
0
1
0
1
0
1
0
1
1
0
0
1
1
1
0
1
1
X2
1
0
0
0
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
X2
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
X2
BICAST
0
1
0
1
0
1
0
X2
0
1
X2
0
1
0
1
X2
0
1
X2
X2
X2
X2
OUT_A
IN_C
IN_C
Idle
IN_C
IN_C
IN_C
Idle
IN_C
Idle
IN_C
IN_C
Idle
IN_C
IN_A
IN_A
IN_A
IN_A
IN_A
IN_A
IN_A
IN_A
IN_A
OUT_B
Idle
IN_C
IN_C
IN_C
Idle
IN_C
IN_C
IN_B
IN_B
IN_B
IN_B
IN_B
IN_B
Idle
IN_C
IN_C
Idle
IN_C
IN_C
IN_B
IN_B
IN_B
1 Switching is done on a lane-by-lane basis, but input equalization, output pre-emphasis, and loopback are set for each port.
2 Don’t care.
OUT_C
IN_A
IN_A
IN_B
IN_B
IN_C
IN_C
IN_C
IN_A
IN_B
IN_B
IN_C
IN_C
IN_C
IN_A
IN_A
IN_B
IN_C
IN_C
IN_C
IN_A
IN_B
IN_C
Rev. C | Page 16 of 21