AD8228 查看數據表（PDF） - Analog Devices
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AD8228 Datasheet PDF : 24 Pages
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AD8228
THEORY OF OPERATION
I
VBIAS
I
IB COMPENSATION
A1
C1
A2
C2
IB COMPENSATION
10kΩ
10kΩ
+VS
+VS
600Ω
–IN
–VS
10kΩ
R1
22kΩ
R2
22kΩ
Q1
+VS
+VS
Q2
R3
V1 4.889kΩ V2
G1 G2
+VS
600Ω
+IN
–VS
–VS GAIN R4 –VS
SET 489Ω
Figure 41. Simplified Schematic
A3
+VS
–VS
10kΩ
OUTPUT
REF
–VS
ARCHITECTURE
The AD8228 is based on the classic three op amp topology. This
topology has two stages: a preamplifier to provide differential
amplification, followed by a difference amplifier to remove the
common-mode voltage. Figure 41 shows a simplified schematic
of the AD8228.
The first stage is composed of the A1 and A2 amplifiers, the Q1
and Q2 input transistors, and the R1 through R4 resistors. The
feedback loop of A1, R1, and Q1 ensures that the V1 voltage is
a constant diode drop below in the negative input voltage.
Similarly, V2 is kept a constant diode drop below the positive
input. Therefore, a replica of the differential input voltage is
placed across either R3 (when the gain pins are left open) or
R3||R4 (when the gain pins are shorted). The current that flows
across this resistance must also flow through the R1 and R2
resistors, creating a gained differential signal between the A2
and A1 outputs. Note that, in addition to a gained differential
signal, the original common-mode signal, shifted a diode drop
down, is also still present.
The second stage is a difference amplifier, composed of A3 and
four 10 kΩ resistors. The purpose of this stage is to remove the
common-mode signal from the amplified differential signal.
The AD8228 does not depend on external resistors. Much of the
dc performance of precision circuits depends on the accuracy and
matching of resistors. The resistors on the AD8228 are laid out to
be tightly matched. The resistors of each part are laser trimmed
and tested for their matching accuracy. Because of this trimming
and testing, the AD8228 can guarantee high accuracy for speci-
fications such as gain drift, common-mode rejection (CMRR),
and gain error.
SETTING THE GAIN
The AD8228 can be configured for a gain of 10 or 100 with no
external components. Leave Pin 2 and Pin 3 open for a gain of 10;
short Pin 2 and Pin 3 together for a gain of 100 (see Figure 42).
G = 10
PIN 2 AND PIN 3 OPEN
G = 100
PIN 2 AND PIN 3 SHORTED
+VS
+VS
1
8
–IN
2
1
8
–IN
2
3 AD8228
7 VOUT
3 AD8228
7 VOUT
+IN
4
6
5 REF
+IN
4
6
5 REF
–VS
–VS
Figure 42. Setting the Gain
The transfer function with Pin 2 and Pin 3 open is
VOUT = 10 × (VIN+ − VIN−) + VREF
The transfer function with Pin 2 and Pin 3 shorted is
VOUT = 100 × (VIN+ − VIN−) + VREF
COMMON-MODE INPUT VOLTAGE RANGE
The three op amp architecture of the AD8228 applies gain and
then removes the common-mode voltage. Therefore, internal
nodes in the AD8228 experience a combination of both the
gained signal and the common-mode signal. This combined
signal can be limited by the voltage supplies even when the
individual input and output signals are not. Figure 10 through
Figure 13 show the allowable common-mode input voltage
ranges for various output voltages and supply voltages.
Rev. 0 | Page 16 of 24
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