AD9139 查看數據表（PDF） - Analog Devices

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AD9139

16-Bit, 1600 MSPS, TxDAC+ Digital-to-Analog Converter

Analog Devices 

Data Sheet

AD9139

SED PATTERN S3 HIGH BITS REGISTER

Address: 0x68, Reset: 0x00, Name: SED_PATT_H_S3

Table 76. Bit Descriptions for SED_PATT_H_S3

Bit No.

Bit Name

[2:0]

SED_PATTERN_FALL_S3 [15:8]

Description

SED S3 falling edge high bits.

Reset

0x00

Access

RW

PARITY CONTROL REGISTER

Address: 0x6A, Reset: 0x00, Name: PARITY_CTRL

Table 77. Bit Descriptions for PARITY_CTRL

Bit No. Bit Name

Settings

7

PARITY_ENABLE

6

PARITY_EVEN

5

PARITY_ERR_CLEAR

[4:2] Reserved

1

PARERRFAL

0

PARERRRIS

Description

Reset Access

1 Enable parity.

0

RW

0 Odd parity.

0

RW

1 Even parity.

Set to 1 to clear parity error counters.

0

RW

Reserved.

0x0 R

When 1, signals a falling edge parity error was detected. 0

R

When 1, signals a rising edge parity error was detected. 0

R

PARITY ERROR RISING EDGE REGISTER

Address: 0x6B, Reset: 0x00, Name: PARITY_ERR_RISING

Table 78. Bit Descriptions for PARITY_ERR_RISING

Bit No. Bit Name

Description

[7:0]

PARITY RISING EDGE ERROR

Number of rising edge-based errors detected (S0 and S2). Clipped to 256.

COUNT

Reset Access

0x00 R

PARITY ERROR FALLING EDGE REGISTER

Address: 0x6C, Reset: 0x00, Name: PARITY_ERR_FALLING

Table 79. Bit Descriptions for PARITY_ERR_FALLING

Bit No. Bit Name

Description

[7:0] PARITY FALLING EDGE ERROR Number of falling edge-based errors detected (S1 and S3). Clipped to 256.

COUNT

Reset Access

0x00 R

VERSION REGISTER

Address: 0x7F, Reset: 0x0B, Name: Version

Table 80. Bit Descriptions for Version

Bit No.

Bit Name

[7:0]

Version

Settings

Description

Chip version

Reset

0x0B

Access

R

Rev. A | Page 55 of 56

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