AD9142 查看數據表（PDF） - Analog Devices
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AD9142 Datasheet PDF : 65 Pages
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AD9142
Data Sheet
DIGITAL SPECIFICATIONS
TMIN to TMAX, AVDD33 = 3.3 V, DVDD18 = 1.8 V, CVDD18 = 1.8 V, IOUTFS = 20 mA, maximum sample rate, unless otherwise noted.
Table 2.
Parameter
CMOS INPUT LOGIC LEVEL
Input
Logic High
Logic Low
CMOS OUTPUT LOGIC LEVEL
Output
Logic High
Logic Low
LVDS RECEIVER INPUTS
Input Voltage Range
Input Differential Threshold
Symbol
VIA or VIB
VIDTH
Input Differential Hysteresis
Receiver Differential Input Impedance
DAC UPDATE RATE
DAC Adjusted Update Rate
DAC CLOCK INPUT (DACCLKP, DACCLKN)
Differential Peak-to-Peak Voltage
Common-Mode Voltage
REFCLK/SYNCCLK INPUT (REFP/SYNCP, REFN/SYNCN)
Differential Peak-to-Peak Voltage
Common-Mode Voltage
Input Clock Frequency
SERIAL PORT INTERFACE
Maximum Clock Rate
Minimum Pulse Width
High
Low
Setup Time
Hold Time
Setup Time
VIDTHH to VIDTHL
RIN
SCLK
tPWH
tPWL
tDS
tDH
tDCSB
Test Conditions/Comments
DVDD18 = 1.8 V
DVDD18 = 1.8 V
DVDD18 = 1.8 V
DVDD18 = 1.8 V
Data and FRAME inputs
DCI input
2× interpolation
Self biased input, ac-coupled
1 GHz ≤ fVCO ≤ 2.1 GHz
SDIO to SCLK
SDIO to SCLK
CS to SCLK
Min Typ Max Unit
1.2
V
0.6 V
1.4
V
0.4 V
825
1675 mV
−100
+100 mV
−225
+225 mV
20
mV
120
Ω
1600 MSPS
250 MSPS
100 500 2000 mV
1.25
V
100 500 2000 mV
1.25
V
450 MHz
40
MHz
12.5 ns
12.5 ns
1.5
ns
0.68
ns
2.38 1.4
ns
Rev. 0 | Page 6 of 64
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