ADG1404(RevB) 查看數據表（PDF） - Analog Devices

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ADG1404
(Rev.:RevB)

1.5 Ω On Resistance, ±15 V/12 V/±5 V, 4:1, iCMOS Multiplexer

Analog Devices 

ADG1404

OUTLINE DIMENSIONS

5.10

5.00

4.90

ORDERING GUIDE

Model1

ADG1404YRUZ

ADG1404YRUZ-REEL7

ADG1404YCPZ-REEL

ADG1404YCPZ-REEL7

1 Z = RoHS Compliant Part.

14

4.50

4.40

4.30

1

8

6.40

BSC

7

PIN 1

0.65 BSC

1.05

1.00

1.20

MAX

0.20

0.80

0.09

0.75

0.15

8°

0.60

0.05

0.30

SEATING

PLANE

0°

0.45

COPLANARITY 0.19

0.10

PIN 1

INDICATOR

0.80

0.75

0.70

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MO-153-AB-1

Figure 33. 14-Lead Thin Shrink Small Outline Package [TSSOP]

(RU-14)

Dimension shown in millimeters

4.10

4.00 SQ

3.90

0.65

BSC

0.35

0.30

0.25

13

12

16

1

EXPOSED

PAD

PIN 1

INDICATOR

2.60

2.50 SQ

2.40

TOP VIEW

0.50

0.40

9

8

4

5

BOTTOM VIEW

0.30

0.05 MAX

0.02 NOM

COPLANARITY

0.08

0.20 REF

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

SECTION OF THIS DATA SHEET.

COMPLIANT TO JEDEC STANDARDS MO-220-WGGC.

Figure 34. 16-Lead Lead Frame Chip Scale Package [LFCSP]

4 mm × 4 mm Body and 0.75 mm Package Height

(CP-16-26)

Dimensions shown in millimeters

Temperature Range

−40°C to +125°C

−40°C to +125°C

−40°C to +125°C

−40°C to +125°C

Package Description

14-Lead Thin Shrink Small Outline Package [TSSOP]

14-Lead Thin Shrink Small Outline Package [TSSOP]

16-Lead Lead Frame Chip Scale Package [LFCSP]

16-Lead Lead Frame Chip Scale Package [LFCSP]

Data Sheet

Package Option

RU-14

RU-14

CP-16-26

CP-16-26

©2008–2016 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.

D06841-0-9/16(B)

Rev. B | Page 16 of 16

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