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N28F001BX-T70 查看數據表(PDF) - Intel

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N28F001BX-T70 Datasheet PDF : 33 Pages
First Prev 31 32 33
28F001BX-T 28F001BX-B
Revision History
Number
Description
-004
Removed Preliminary classification
Latched address A16 in Figure 5
Updated Boot Block Program and Erase section ‘‘If boot block program or erase is attempted
while RP is at VIH either the Program Status or Erase Status bit will be set to ‘‘1’’
reflective of the operation being attempted and indicating boot block lock ’’
Updated Figure 11 28F001BX Erase Suspend Resume Flowchart
Added DC Characteristics typical current values
Combined VPP Standby current and VPP Read current into one VPP Standby current spec with
two test conditions (DC Characteristics table)
Added maximum program erase times to Erase and Programming Performance table
Added Figures 13–16
Added Extended Temperature proliferations
-005
PWD changed to RP for JEDEC standardization compatibility
Revised symbols i e CE OE etc to CE OE etc
-006
-007
Added specifications for -90 and -70 product versions
Added VOH CMOS Specification
Added reference to 28F001BN
33

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