ADT7475 查看數據表（PDF） - ON Semiconductor
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ADT7475 Datasheet PDF : 58 Pages
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ADT7475
Table 8. Configuring Pin 5 as SMBALERT Output
Register
Bit Setting
Configuration Register 3 (0x78)
[0] ALERT Enable = 1
Assigning THERM Functionality to a Pin
Pin 9 on the ADT7475 has four possible functions:
SMBALERT, THERM, GPIO, and TACH4. The user
chooses the required functionality by setting Bit 0 and Bit 1
of Configuration Register 4 (0x7D).
Table 9. Pin 9 Configuration
Bit 1
0
0
1
1
Bit 0
0
1
0
1
Function
TACH4
THERM
SMBALERT
GPIO
Once Pin 9 is configured as THERM, it must be enabled
(Bit 1, Configuration Register 3 (0x78)).
THERM as an Input
When THERM is configured as an input, the user can time
assertions on the THERM pin. This can be useful for
connecting to the PROCHOT output of a CPU to gauge
system performance.
The user can also set up the ADT7475 so that, when the
THERM pin is driven low externally, the fans run at 100%.
The fans run at 100% for the duration of the time that the
THERM pin is pulled low. This is done by setting the
BOOST bit (Bit 2) in Configuration Register 3 (0x78) to 1.
This works only if the fan is already running, for example,
in manual mode when the current duty cycle is above 0x00
or in automatic mode when the temperature is above TMIN.
If the temperature is below TMIN or if the duty cycle in
manual mode is set to 0x00, pulling the THERM low
externally has no effect. See Figure 26 for more information.
TMIN
THERM Timer
The ADT7475 has an internal timer to measure THERM
assertion time. For example, the THERM input can be
connected to the PROCHOT output of a Pentium 4 CPU to
measure system performance. The THERM input can also be
connected to the output of a trip point temperature sensor.
The timer is started on the assertion of the ADT7475’s
THERM input and stopped when THERM is un−asserted.
The timer counts THERM times cumulatively, that is, the
timer resumes counting on the next THERM assertion. The
THERM timer continues to accumulate THERM assertion
times until the timer is read (it is cleared on read) or until it
reaches full scale. If the counter reaches full scale, it stops at
that reading until cleared.
The 8−bit THERM timer status register (0x79) is designed
so that the Bit 0 is set to 1 on the first THERM assertion. Once
the cumulative THERM assertion time has exceeded 45.52
ms, Bit 1 of the THERM timer is set and Bit 0 becomes the
LSB of the timer with a resolution of 22.76 ms, see Figure 27.
When using the THERM timer, be aware of the following.
After a THERM timer read (Register 0x79), the following
happens:
1. The contents of the timer are cleared on read.
2. The F4P bit (Bit 5) of Interrupt Status Register 2
needs to be cleared (assuming that the THERM
timer limit has been exceeded).
If the THERM timer is read during a THERM assertion,
the following happens:
3. The contents of the timer are cleared.
4. Bit 0 of the THERM timer is set to 1 (because a
THERM assertion is occurring).
5. The THERM timer increments from zero.
6. If the THERM timer limit (Register 0x7A) = 0x00,
the F4P bit is set.
THERM
THERM 0 0 0 0 0 0 0 1
TIMER
76543210
(REG. 0x79)
THERM
THERM ASSERTED
3 22.76ms
THERM
THERM ASSERTED TO LOW AS AN INPUT:
FANS DO NOT GO TO 100% BECAUSE
TEMPERATURE IS BELOW TMIN.
THERM ASSERTED TO LOW AS AN INPUT:
FANS DO NOT GO TO 100% BECAUSE
TEMPERATURE IS ABOVE TMIN AND FANS
ARE ALREADY RUNNING.
Figure 26. Asserting THERM Low as an Input in
Automatic Fan Speed Control Mode
ACCUMULATE THERM LOW
ASSERTION TIMES
THERM 0 0 0 0 0 0 1 0
TIMER
76543210
(REG. 0x79)
THERM ASSERTED
≥ 45.52ms
THERM
ACCUMULATE THERM LOW
ASSERTION TIMES
THERM 0 0 0 0 0 1 0 1
TIMER
(REG. 0x79)
7 6 5 4 3 2 1 0 THERM ASSERTED ≥ 113.8ms
(91.04ms + 22.76ms)
Figure 27. Understanding the THERM Timer
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