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ADV7172KST 查看數據表(PDF) - Analog Devices

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ADV7172KST Datasheet PDF : 60 Pages
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ADV7172/ADV7173
Mode 2: Slave Option HSYNC, VSYNC, BLANK
(Timing Register 0 TR0 = X X X X X 1 0 0)
In this mode the ADV7172/ADV7173 accepts horizontal and vertical SYNC signals. A coincident low transition of both HSYNC and
VSYNC inputs indicates the start of an odd field. A VSYNC low transition when HSYNC is high indicates the start of an Even Field.
The BLANK signal is optional. When the BLANK input is disabled, the ADV7172/ADV7173 automatically blanks all normally
blank lines as per CCIR-624. Mode 2 is illustrated in Figure 30 (NTSC) and Figure 31 (PAL).
DISPLAY
VERTICAL BLANK
DISPLAY
522 523 524 525
1
HSYNC
BLANK
VSYNC
2
3
4
EVEN FIELD
DISPLAY
5
6
7
8
ODD FIELD
VERTICAL BLANK
9
10
11
20
21
22
DISPLAY
HSYNC
BLANK
VSYNC
260 261 262 263 264 265 266 267 268 269 270 271 272 273 274
ODD FIELD
EVEN FIELD
Figure 30. Timing Mode 2 (NTSC)
283 284 285
DISPLAY
VERTICAL BLANK
DISPLAY
622
623
624
625
1
2
3
4
5
6
7
HSYNC
BLANK
VSYNC
EVEN FIELD
ODD FIELD
DISPLAY
VERTICAL BLANK
21
22
23
DISPLAY
309
310
311 312
313
314
315
316
317
318
319
320
HSYNC
BLANK
VSYNC
ODD FIELD
EVEN FIELD
Figure 31. Timing Mode 2 (PAL)
334
335
336
–20–
REV. B

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