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AGM3224I 查看數據表(PDF) - AZ Displays

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AGM3224I Datasheet PDF : 15 Pages
First Prev 11 12 13 14 15
(MODE2)
(VDD=4.5~5.5V , V0= +10.0~ +42.0V, Ta=+0! C~50! C)
Item
Symbol Min. Typ. Max. Unit
Shift clock period
tWCK
40
-
-
ns
Shift clock #H$pulse wide
tWCKH
12
-
-
ns
Shift clock #L$pulse wide
tWCKL
14
-
-
ns
Data setup time
tDS
5
-
-
ns
Data hold time
tDH
15
-
-
ns
Latch pulse #H$pulse wide
tWLPH
15
-
-
ns
Shift clock rise to latch pulse rise time
tLD
5
-
-
ns
Shift clock fall to latch pulse fall time
tSL
25
-
-
ns
Latch pulse rise to shift clock rise time
tLS
25
-
-
ns
Latch pulse fall to shift clock fall time
tLH
25
-
-
ns
Enable setup time
tTS
5
-
-
ns
Input signal rise time (Note 1)
tR
-
-
50
ns
Input signal fall time (Note 1)
tF
-
-
50
ns
Output delay time
tD
-
-
28
ns
FLM setup time
tFS
30
-
-
ns
FLM hold time
tFH
50
-
-
ns
Note 1: (tWCK - tWCKH - tWCKL)/2 is maximum in the case of high speed operation
AZ DISPLAYS, INC.
PAGE 12

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