MCM69L817ZP6.5R 查看數據表（PDF） - Motorola => Freescale

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MCM69L817ZP6.5R

256K x 18 Bit Data Latch BurstRAM™ Synchronous Fast Static RAM

Motorola => Freescale 

STOP CLOCK WITH DESELECT OPERATION TIMING

K

ADSC

SE1

DATA IN

VIH OR VIL FIXED (SEE NOTE)

DQx

DATA

DATA

HIGH–Z

CONTINUE

BURST READ

CLOCK STOP

(DESELECTED)

WAKE UP

(DESELECTED)

NOTE: While the clock is stopped, DATA IN must be fixed in a high (VIH) or low (VIL) state to reduce the DC current of the

input buffers. For lowest power operation, all data and address lines should be held in a low (VIL) state and control

lines held in an inactive state.

MCM69L817

14

MOTOROLA FAST SRAM

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