EDS2508APSA-75 查看數據表（PDF） - Elpida Memory, Inc

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EDS2508APSA-75

256M bits SDRAM

Elpida Memory, Inc 

EDS2508APSA, EDS2516APSA

Function Truth Table

The following table shows the operations that are performed when each command is issued in each mode of the

SDRAM.

The following table assumes that CKE is high.

Current state

/CS /RAS /CAS /WE Address

Command

Operation

Precharge

H

×

×

×

×

DESL

Enter IDLE after tRP

L

H

H

H

×

NOP

Enter IDLE after tRP

L

H

H

L

×

BST

ILLEGAL

L

H

L

H

BA, CA, A10 READ/READA

ILLEGAL*3

L

H

L

L

BA, CA, A10 WRIT/WRITA

ILLEGAL*3

L

L

H

H

BA, RA

ACT

ILLEGAL*3

L

L

H

L

BA, A10

PRE, PALL

NOP*5

L

L

L

H

×

L

L

L

L

MODE

REF, SELF

MRS

ILLEGAL

ILLEGAL

Idle

H

×

×

×

×

DESL

NOP

L

H

H

H

×

NOP

NOP

L

H

H

L

×

BST

ILLEGAL

L

H

L

H

BA, CA, A10 READ/READA

ILLEGAL*4

L

H

L

L

BA, CA, A10 WRIT/WRITA

ILLEGAL*4

L

L

H

H

BA, RA

ACT

Bank and row active

L

L

H

L

BA, A10

PRE, PALL

NOP

L

L

L

H

×

L

L

L

L

MODE

REF, SELF

MRS

Refresh

Mode register set*8

Row active

H

×

×

×

×

DESL

NOP

L

H

H

H

×

NOP

NOP

L

H

H

L

×

BST

ILLEGAL

L

H

L

H

BA, CA, A10 READ/READA

Begin read*6

L

H

L

L

BA, CA, A10 WRIT/WRITA

Begin write*6

L

L

H

H

BA, RA

L

L

H

L

BA, A10

ACT

PRE, PALL

Other bank active

ILLEGAL on same bank*2

Precharge*7

L

L

L

H

×

L

L

L

L

MODE

REF, SELF

MRS

ILLEGAL

ILLEGAL

Read

H

×

×

×

×

DESL

Continue burst to end

L

H

H

H

×

NOP

Continue burst to end

L

H

H

L

×

BST

Burst stop

L

H

L

H

BA, CA, A10 READ/READA

Continue burst read to /CAS

latency and New read

L

H

L

L

BA, CA, A10 WRIT/WRITA

Term burst read/start write

L

L

H

H

BA, RA

ACT

Other bank active

ILLEGAL on same bank*2

L

L

H

L

BA, A10

PRE, PALL

Term burst read and Precharge

L

L

L

H

×

L

L

L

L

MODE

REF, SELF

MRS

ILLEGAL

ILLEGAL

Data Sheet E0228E30 (Ver. 3.0)

18

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