GTL2010PW-T 查看數據表（PDF） - Philips Electronics

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GTL2010PW-T

Bi-directional low voltage translators

Philips Electronics 

Answer:: The low voltage limit is not in the DC specifications but the bullet under "Features" states level

translation down to 1 V. The GTL20xx devices SREF is not recommended below 1 V to insure a low on resistance.

The problem with a SREF voltage lower than 1V is that the gate overdrive, or the amount that the gate voltage is

above the threshold, decreases as the SREF voltage is lowered. This means that the NMOS transistor does not turn

on as hard and so the on resistance increases. Once you get below a certain gate overdrive, the on resistance

increases rapidly. The part will still be functional, but the on resistance will be higher.

10. Question: We want to use the GTL2010 to translate signals from 1.5 V to 3.3 V so our settings will be VSREF =

1.5V, VDREF = 3.3V. But we use only 6-bits of the 10-bit GTL2010, so there are 4-bits unused. We plan to use these

other 4-bits for signal translation from 3.3V to 5V. Looking through the application note we know that if the VDREF

is changed to 5V, then the GTL2010 can support both 3.3V and 5V output mix on the D side. But is it suitable for

VSREF to be changed to 3.3V so that the input will support both a 1.5V and 3.3V input mix on the S side?

1.5V

signal

3.3V

signal

3.3V

1.5V

3.3V

RRRRRRRRRR

U1

1 GND

2 Sref

3 S1

4 S2

5 S3

6 S4

7 S5

8 S6

9 S7

10 S8

11 S9

12 S10

Gref 24

Dref 23

D1 22

D2 21

D3 20

D4 19

D5 18

D6 17

D7 16

D8 15

D9 14

D10 13

GTL2010

3.3V

R1

200K

C1

0.1uF

5V

RRRRRRRRRR

3.3V

signa

5V

signa

Figure 18. Application Diagram

Answer: To protect the 1.5 V parts the SREF must stay at 1.5 V and you will have to rely on the 3.3 V pull-up on

the S side and the 5 V pull-up on the D side to get the high levels since the path will be essentially cut off above 1.5

V. It is possible to mix the voltages as proposed but the SREF must be 1.5 V and the resistors on both the 3.3 V and

5 V sides determine the highs with the low being passed through the GTL2010.

11. Multi-part Question:

I have a design where I need to translate voltage levels. My design needs fix 3.3V levels on D side.

Voltage levels on S side vary from 1.8V to 5V. So I did the following:

1. SREF to 1.8 V, GREF+DREF through R = 200 kΩ to 5 V, D pins pull-ups to 3.3 V. This is 1.8 V compliant on

S side.

2. SREF to 3.3 V, GREF+DREF through R = 200 kΩ to 5 V, D pins pull-ups to 3.3 V. This is 3.3 V compliant on

S side.

3. SREF+GREF through R=200 kΩ to 5 V, DREF to 3.3 V, D pins pull-ups to 3.3 V. S pins pull-up to 5 V. I

assume that DREF pin is now Vreference so it should not exceed 4.4V and should be 1.5 V below GREF. This

is 5.0 V compliant on S side. The level on D side is 3.3 V.

Question A: Am I right for the last assumption and is my design correct?

Answer A: We assume that you are describing three different parts or at least three different jumper

configurations, that is the 1.8 V, 3.3 V, and 5 V are not all present on different sources and drains at the same

time because the level shift can only be down to one low voltage level per part/configuration.

The answer to 3 is yes, the S and D are labels, the electrical characteristics are identical so connecting the SREF

and GREF together and using a 200 kΩ resistor to 5 V to bias them with the DREF at 3.3 V is equivalent to

connecting the DREF and GREF together and biasing them through the 200 K ohm resistor to 5 V, with the

20

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