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AN1045 查看數據表(PDF) - STMicroelectronics

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AN1045 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ST7 S/W IMPLEMENTATION OF I2C BUS MASTER
INPUT/OUTPUT : None.
DESCRIPTION : Generates I2C-Bus Stop Condition.
COMMENTS :
--------------------------------------------------------------------------*/
void I2Cm_Stop (void)
{
SetBit(PADDR,SDA);
/* Configure SDA and SCL as output open drain to have a low state */
SetBit(PADDR,SCL);
ClrBit(PADDR,SCL);
/* Configure SCL as floating input to have a high state
*/
delay(4);
/* Macro delay with time=4 (4.875 µs)
*/
ClrBit(PADDR,SDA);
/* Configure SDA as floating input to have a high state
*/
/* Delay after the Stop did in main.c with Wait_1ms()
*/
}
/*--------------------------------------------------------------------------
ROUTINE NAME : wait_Ack
INPUT/OUTPUT : None.
DESCRIPTION : Acknowledge received?
COMMENTS : Transfer sequence = DATA, ACK.
--------------------------------------------------------------------------*/
void wait_Ack (void)
{
SetBit(PADDR,SCL);
/* Output open drain to have a low level */
ClrBit(PADDR,SDA); /* Floating input, the slave has to pull SDA low */
delay(1);
if (ValBit(PADR,SDA))
/* Test of SDA level, if high -> pb */
{
SetBit(I2C_SR2,AF);
ClrBit(I2C_SR1,ACK);
return;
}
delay(2);
if (ValBit(PADR,SDA))
/* Test of SDA level, if high -> pb */
{
SetBit(I2C_SR2,AF);
ClrBit(I2C_SR1,ACK);
return;
}
delay(5);
ClrBit(PADDR,SCL);
/* Start of the generation of 1 clock pulse */
delay(1);
if (ValBit(PADR,SDA)) /* Test of SDA level, if high -> pb */
{
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