APA2069 查看數據表（PDF） - Anpec Electronics
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APA2069 Datasheet PDF : 26 Pages
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APA2069
Application Descriptions (Cont.)
Volume Control Function
Input Resistance, Ri
APA2069 has an internal stereo volume control whose
setting is a function of the DC voltage applied to the
VOLUME input pin. TheAPA2069 volume control con-
sists of 32 steps that are individually selected by a
variable DC voltage level on the VOLUME control pin.
The range of the steps, controlled by the DC voltage,
are from 20dB to -80dB. Each gain step corresponds
to a specific input voltage range, as shown in table.
To minimize the effect of noise on the volume control
pin, which can affect the selected gain level, hyster-
esis and clock delay are implemented. The amount of
hysteresis corresponds to half of the step width, as
shown in volume control graph.
APA2069 DC Volume Control Curve (BTL)
20
10
0
-10
Forw ard
-20
Backw ard
-30
The gain for each audio input of the APA2069 is set by
the internal resistors (Ri and Rf) of volume control
amplifier in inverting configuration.
SE
Gain
=
AV
=
-
RF
Ri
(2)
BTL
Gain
=
-2
x
RF
Ri
(3)
BTL mode operation brings the factor of 2 in the gain
equation due to the inverting amplifier mirroring the
voltage swing across the load. For the varying gain
setting, APA2069 generates each input resistance on
figure 4. The input resistance will affect the low frequency
performance of audio signal. The minmum input
resistance is 10kΩ when gain setting is 20dB and the
resistance will ramp up when close loop gain below
20dB. The input resistance has wide variation (+/-10%)
caused by process variation.
Ri(kΩ)
120
Ri vs Gain(BTL)
100
80
-40
60
-50
40
-60
-70
-80
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
DC volume (V)
Figure 3: Gain setting vs VOLUME pin voltage
For highest accuracy, the voltage shown in the ‘rec-
ommended voltage’column of the table is used to
select a desired gain. This recommended voltage is
exactly halfway between the two nearest transitions.
The gain levels are 2dB/step from 20dB to -40dB in
BTL mode, and the last step at -80dB as mute mode.
20
0
-40
-30
-20
-10
0
10
20
Gain(dB)
Figure 4: Input resistance vs Gain setting
Input Capacitor, Ci
In the typical application an input capacitor, Ci, is
required to allow the amplifier to bias the input signal
to the proper DC level for optimum operation. In this
Copyright © ANPEC Electronics Corp.
19
Rev. A.1 - Aug., 2005
www.anpec.com.tw
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