MX28F2000TPC-12C4 查看數據表（PDF） - Macronix International

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MX28F2000TPC-12C4

2M-BIT [256K x 8] CMOS FLASH MEMORY

Macronix International 

MX28F2000T

COMPATIBLE BLOCK ERASE

This device can be applied to the compatible block erase

algorithm shown in the following flowchart. This algorithm

allows to obtain faster erase time by the block (refer to

COMPATIBLE BLOCK ERASE FLOWCHART

page2) without any voltage stress to the device nor

deterioration in reliability of data.

START

For selected block(s),

All bits PGM"0"

N=0

BLOCK ERASE FLOW

P/N: PM0472

BLOCK ERASE FLOW

N = N+1

FAIL

ERSVFY FLOW

NO

N = 1024?

ALL BITS VERIFIED

YES

APPLY

VPP = VCC

BLOCK ERASE FAIL

END

BLOCK ERASE

COMPLETE

START

Apply

VPP = VPPH

WRITE SETUP BLOCK ERASE COMMAND

( 60H )

WRITE BLOCK ERASE COMMAND

( LOAD FIRST SECTOR ADDRESS , 60H )

LOAD OTHER SECTORS' ADDRESS

IF NECESSARY

( LOAD OTHER SECTOR ADDRESS )

WAIT

10 ms

END

23

REV. 1.0, Jun 13, 1997

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