MX28F2000PRC-90C4 查看數據表（PDF） - Macronix International

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MX28F2000PRC-90C4

2M-BIT [256K x 8] CMOS FLASH MEMORY

Macronix International 

COMPATIBLE BLOCK ERASE TIMING WAVEFORM

Indicated block data are erased. Control verification and

additional erasure externally according to compatible

block erase flowchart.

MX28F2000P

Vcc 5V

12V

Vpp

0V

A0 ~ A13

Setup block erase/erase command

tVPS

A14 ~ A17

WE

Block

Block

address 0 address 1

tAS tAH

tCWC

tBALC

CE

tCEPH1

tOES tCEP

tCEP tCEPH2

OE

tDS tDH tDS tDH

Q7

Command in Command in

Q0~Q6

Command in Command in

Command #60H Command #60H

Block erase

Erase Verify

Block

address #

Verify

address

Verify

address

tAS tAH

tVPH

tBAL

tET

tCESV

tCEP

tCES

tCESC

tDS tDH

Command in

tVA

tDF

Data valid

Command in

Command #A0H

Data valid

P/N: PM0380

REV. 1.5, OCT 29, 1998

25

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