DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

AS3910-BQFP 查看數據表(PDF) - austriamicrosystems AG

零件编号
产品描述 (功能)
生产厂家
AS3910-BQFP
AmsAG
austriamicrosystems AG AmsAG
AS3910-BQFP Datasheet PDF : 47 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
AS3910
Data Sheet - Application Information
Duration time: 5ms max
This command is accepted in any mode where the oscillator and regulators are running. This command is not accepted in case the external
definition of the regulated voltage is selected in the Regulated Voltage Definition Register (#16, bit reg_s is set to H)
8.10.11 Calibrate Modulation Depth
Starts a patent pending sequence, which activates the transmission, measures the modulation depth and adapts it to comply with the modulation
depth specified in the Modulation Depth Definition Register (#10). When calibration procedure is finished result is displayed in Modulation Depth
Display Register. Please see AM Modulation Depth Definition Using Direct Command Calibrate Modulation Depth (page 40) for details about
setting the AM modulation depth and running this command.
Duration time: 10ms max
This command is accepted in any mode where the oscillator and regulators are running.
8.10.12 Calibrate Antenna
Sending this command starts a patent pending sequence which adjusts the parallel capacitances connected to TRIMx pins so that the antenna
LC is in resonance. See Calibrate Antenna Resonance on page 42 for details.
Duration time: 400μs max
This command is accepted in any mode where the oscillator and regulators are running.
8.10.13 Check Antenna Resonance
This command measures the antenna LC tank resonance to determine whether a calibration is needed. See Check Antenna Resonance on
page 42 for details.
Duration time: 42μs max.
This command is accepted in any mode where the oscillator and regulators are running.
8.10.14 Clear RSSI
The Receiver automatically clears the RSSI bits in the Receiver State Display Register and starts to measure the RSSI when the signal rx_on is
asserted. Since the RSSI bits store peak value (peak-hold type) eventual variation of the receiver input signal will not be followed (this may
happen in case of long message or test procedure). The direct command Clear RSSI clears the RSSI bits in the Receiver State Display Register,
the RSSI measurement is restarted (in case of course rx_on is still high).
8.10.15 Transparent Mode
Enter in the Transparent mode. The Transparent mode is entered on the falling edge of signal SEN and is maintained as long as signal SEN is
kept low. See Transparent Mode on page 43 for details about the Transparent Mode.
This command is only accepted when the Transmitter and Receiver are operating.
8.11 Registers
The 6 bit register addresses below are defined in the hexadecimal notation. The possible address range is from 00(hex) to 3F(hex). A sign #
before a number is used in this document to reference a hexadecimal number.
There are two types of registers implemented in the AS3910: configuration registers and display registers. The configuration registers are used
to configure the AS3910. They can be written and read through the SPI (RW). The display registers are read only (RO); they contain information
about the AS3910 internal state which can be accessed through the SPI.
www.austriamicrosystems.com/HF_RFID_Reader/AS3910
Revision 2.3
23 - 47

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]