M74HC131TTR 查看數據表（PDF） - STMicroelectronics

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M74HC131TTR

3 TO 8 LINE DECODER/LATCH

STMicroelectronics 

M74HC131

3 TO 8 LINE DECODER/LATCH

s HIGH SPEED:

tPD = 22ns (TYP.) at VCC = 6V

s LOW POWER DISSIPATION:

ICC = 4µA(MAX.) at TA=25°C

s HIGH NOISE IMMUNITY:

VNIH = VNIL = 28 % VCC (MIN.)

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 4mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s WIDE OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 6V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 131

DESCRIPTION

The M74HC131 is an high speed CMOS 3 TO 8

LINE DECODER fabricated with silicon gate

C2MOS technology.

This device is a DECODER/LATCH capable of

selecting arbitrarily one of eight outputs by three

binary inputs A, B, and C, in this case, the

selected output is at logic ”low”.

DIP

SOP

TSSOP

ORDER CODES

PACKAGE

TUBE

DIP

SOP

TSSO P

M74HC131B1R

M74HC131M1R

T&R

M74HC131RM13TR

M74HC131TTR

Also, when ENABLE input G1 is set low or

ENABLE input G2 is set high, selection is inhibited

regardless of other input signals and all the

outputs are at high.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

July 2001

1/11

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