AT88SC1003 查看數據表（PDF） - Atmel Corporation

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AT88SC1003

1K EEPROM–Security Logic with Three Application Zones

Atmel Corporation 

AT88SC1003

Definition of AT88SC1003 Passwords

Table 5. Definition of Passwords

Password

Definition

Security Code (SC)

Bits 80–95

(16 bits)

This password is used to set the SV (Security Validation) flag and is used in determining what

operations are allowed in each zone.

Erase Zone 1 (EZ1)

Bits 432–479

(48 bits)

This password must be programmed during issuer personalization. It is used to erase Application

Zone 1 in Security Level 2. Verification of EZ1 will set the internal flag E1 to “1”.

Erase Zone 2 (EZ2)

Bits 736–767

(32 bits)

This password must be programmed during issuer personalization. It is used to erase Application

Zone 2 in Security Level 2. Verification of EZ2 will set the internal flag E2 to “1”.

Erase Zone 3 (EZ3)

Bits 1536–1583

(48 bits)

This password must be programmed during issuer personalization. It is used to erase Application

Zone 3 in Security Level 2. Verification of EZ3 will set the internal flag E3 to “1”.

Definition of

AT88SC1003 Fuses

• Manufacturer Fuse

This fuse is used to control writes and erases of the manufacturer’s zone. When the

security code has been validated and both the issuer fuse and the manufacturer fuse

are unblown, writes and erases of the MFZ are allowed. Blowing the issuer fuse will also

disable the manufacturer fuse if it has not been blown previously.

• EC2EN Fuse

The EC2 enable fuse selects whether the EC2 zone is used to limit the number of AZ2

erases allowed in Security Mode 2. If the EC2EN fuse is “unblown,” then the AZ2 erases

are limited to 128. If the EC2EN fuse is “blown,” the AZ2 erases are unlimited. After the

issuer fuse is blown, the state of EC2EN fuse is locked and cannot be changed.

• Issuer Fuse

This fuse is used to personalize the AT88SC1003 for end customer use. It is an addi-

tional EEPROM bit that can be programmed to a logic “0”. This is its “blown” state.

Security of the device when the issuer fuse is a logic “1” is described in Table 6 on page

12. The device is in Security Level 2 when the issuer fuse is blown. The device can also

be placed in Security Level 2 by taking FUS pin low, independent of the state of the

issuer fuse. Memory access rules of the device in Security Level 2 are described in

Table 7 on page 13.

11

2035B–SMEM–08/03

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