AT88SC0104CA-MJ 查看數據表（PDF） - Atmel Corporation

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AT88SC0104CA-MJ

CryptoMemory

Atmel Corporation 

AT88SC0104CA

7. Device Operations for Synchronous Protocols

7.1. Clock and Data Transitions

The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low

time periods (see Figure 6 on page 8). Data changes during SCL high periods will indicate a start or stop condition as

defined below.

7.1.1. Start condition

A high-to-low transition of SDA with SCL high defines a START condition which must precede all commands (see

Figure 7 on page 8).

7.1.2. Stop condition

A low-to-high transition of SDA with SCL high defines a STOP condition. After a read sequence, the STOP condition

will place the EEPROM in a standby power mode (see Figure 7 on page 8).

7.1.3. ACKNOWLEDGE

All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a

zero to acknowledge that it has received each word. This happens during the ninth clock cycle (see Figure 8 on

page 9).

7.2.

Memory Reset

After an interruption in communication due protocol errors, power loss or any reason, perform "Acknowledge Polling" to

properly recover from the condition. Acknowledge polling consists of sending a start condition followed by a valid

CryptoMemory command byte and determining if the device responded with an ACKNOWLEDGE.

Figure 4. Bus Time for 2-Wire Serial Communications. SCL: Serial Clock, SDA: Serial Data I/O

tF

tHIGH

tR

SCL

tLOW

tLOW

SDA IN

tSU.STA

tHD.STA

tHD.DAT

tSU.DAT

tSU.STO

tAA

tDH

tBUF

SDA OUT

7

5200ES–CRYPT–08/09

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