Figure 8-2. Write Cycle Timing. SCL: Serial Clock, SDA: Serial Data I/O
SCL
SDA
8th BIT
ACK
WORDn
STOP
CONDITION
tWR(1)
START
CONDITION
Note: The Write Cycle time twr is the time from a valid stop condition of a write sequence to the end of
the internal clear/write cycle.
Figure 8-3. Data Validity
Figure 8-4. START and STOP Definitions
DATA
CHANGE
ALLOWED
8 AT88SC0204CA
5202CS–CRYPT–5/09