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ATF-34143 查看數據表(PDF) - Avago Technologies

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ATF-34143 Datasheet PDF : 14 Pages
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ATF-34143 Electrical Specifications
TA = 25°C, RF parameters measured in a test circuit for a typical device
Symbol Parameters and Test Conditions
Idss [1]
VP [1]
Id
gm[1]
Saturated Drain Current
Pinchoff Voltage
Quiescent Bias Current
Transconductance
VDS = 1.5 V, VGS = 0 V
VDS = 1.5 V, IDS = 10% of Idss
VGS = -0.34 V, VDS = 4 V
VDS = 1.5 V, gm = Idss /VP
IGDO
Gate to Drain Leakage Current
Igss
Gate Leakage Current
NF
Noise Figure
f = 2 GHz
f = 900 MHz
VGD = 5 V
VGD = VGS = -4 V
VDS = 4 V, IDS = 60 mA
VDS = 4 V, IDS = 30 mA
VDS = 4 V, IDS = 60 mA
Ga
Associated Gain
f = 2 GHz
VDS = 4 V, IDS = 60 mA
VDS = 4 V, IDS = 30 mA
OIP3
Output 3rd Order
Intercept Point[3]
f = 900 MHz
f = 2 GHz
+5 dBm Pout /Tone
VDS = 4 V, IDS = 60 mA
VDS = 4 V, IDS = 60 mA
VDS = 4 V, IDS = 30 mA
P1dB
1 dB Compressed
Intercept Point[3]
f = 900 MHz
+5 dBm Pout /Tone
f = 2 GHz
f = 900 MHz
VDS = 4 V, IDS = 60 mA
VDS = 4 V, IDS = 60 mA
VDS = 4 V, IDS = 30 mA
VDS = 4 V, IDS = 60 mA
Notes:
1. Guaranteed at wafer probe level
2. Typical value determined from a sample size of 450 parts from 9 wafers.
3. Using production test board.
Units
mA
V
mA
mmho
μA
μA
dB
dB
dB
dB
dBm
dBm
dBm
dBm
Min.
90
-0.65
180
16
29
Typ.[2]
118
- 0.5
60
230
30
0.5
0.5
0.4
17.5
17
21.5
31.5
30
31
20
19
18.5
Max.
145
-0.35
500
300
0.8
19
Input
50 Ohm
Transmission
Line Including
Gate Bias T
(0.5 dB loss)
Input
Matching Circuit
Γ_mag = 0.30
Γ_ang = 56°
(0.4 dB loss)
DUT
50 Ohm
Transmission
Line Including
Drain Bias T
(0.5 dB loss)
Output
Figure 5. Block diagram of 2 GHz production test board used for Noise Figure, Associated Gain, P1dB, and OIP3 measurements. This circuit represents a trade-off
between an optimal noise match and associated impedance matching circuit losses. Circuit losses have been de-embedded from actual measurements.
3

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