ATmega323(L)
The Program and Data
Addressing Modes
Register Direct, Single
Register Rd
Figure 9. SRAM Organization
Register File
R0
R1
R2
...
R29
R30
R31
I/O Registers
$00
$01
$02
...
$3D
$3E
$3F
Data Address Space
$0000
$0001
$0002
...
$001D
$001E
$001F
$0020
$0021
$0022
...
$005D
$005E
$005F
Internal SRAM
$0060
$0061
...
$085E
$085F
The ATmega323 AVR Enhanced RISC microcontroller supports powerful and efficient
addressing modes for access to the Program memory (Flash) and Data memory
(SRAM, Register File, and I/O Memory). This section describes the different addressing
modes supported by the AVR architecture. In the figures, OP means the operation code
part of the instruction word. To simplify, not all figures show the exact location of the
addressing bits.
Figure 10. Direct Single Register Addressing
The operand is contained in register d (Rd).
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1457G–AVR–09/03