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ATTINY88-AU 查看數據表(PDF) - Atmel Corporation

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ATTINY88-AU Datasheet PDF : 298 Pages
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ATtiny48/88
28. Datasheet Revision History
Please note that page references in this section refer to the current revision of this document.
28.1
Rev. 8008F - 06/10
1. Updated notes 1 and 10 in table in Section 21.2 “DC Characteristics” on page 204.
2. Updated package drawing in Section 26.4 “32CC1” on page 287.
3. Updated bit syntax throughout the datasheet, e.g. from CS02:0 to CS0[2:0].
28.2
Rev. 8008E - 05/10
1. Section 23. “Register Summary” on page 276, added SPH at address 0x3E.
2. Section 26.1 “28M1” on page 284 updated with correct package drawing.
28.3
Rev. 8008D - 03/10
1. Separated Typical Characteristic plots, added Section 22.2 “ATtiny88” on page 247.
2. Updated:
Section 1.1 “Pin Descriptions” on page 3, Port D, adjusted texts ‘sink and source’
and ‘high sink’.
Table 6-3 on page 28 adjusted, to fix TBD.
Section 6.4 “128 kHz Internal Oscillator” on page 28 adjusted, to fix TBD.
Section 8.4 “Watchdog Timer” on page 43, updated.
Section 21.2 “DC Characteristics” on page 204, updated TBD in notes 5 and 8.
3. Added:
– UFBGA package (32CC1) in, “Features” on page 1, “Pin Configurations” on page 2,
Section 25. “Ordering Information” on page 282, and Section 26. “Packaging
Information” on page 284
– Addresses in all Register Desc. tables, with cross-references to Register Summary
– Tape and reel in Section 25. “Ordering Information” on page 282
28.4
Rev. 8008C - 03/09
1. Updated sections:
“Features” on page 1
“Reset and Interrupt Handling” on page 13
“EECR – EEPROM Control Register” on page 22
“Features” on page 127
“Bit Rate Generator Unit” on page 133
“TWBR – TWI Bit Rate Register” on page 154
“TWHSR – TWI High Speed Register” on page 157
“Analog Comparator” on page 158
“Overview” on page 161
“Operation” on page 162
“Starting a Conversion” on page 163
8008F–AVR–06/10
291

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