BD4155FV 查看數據表（PDF） - ROHM Semiconductor
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BD4155FV Datasheet PDF : 17 Pages
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BD4155FV
●BLOCK DIAGRAM
Technical Note
3.3V
V3_IN
4
5
V3_IN2
V3AUX_IN
18
3.3V
1.5V
V15_IN1
15
16
V15_IN2
VD
TSD,CL,UVLO
VD
TSD,CL,UVLO_AUX
V3AUX_IN
(from card) CPPE#
12
(from card) CPUSB#
11
(from host) SYSR
3
Input
logic
VD
TSD,CL,UVLO
Power
good
EN,SYSR
CPUSB#
CPPE#
V3AUX_IN V3AUX_IN Thermal
TSD
protection V3_IN,V3AUX_IN,V15_IN
V3,V3AUX,V15
Reference
CL
Block
V3_IN Under
UVLO
Charge
Pump
V3AUX_IN
V15_IN
VD
voltage
lock out
UVLO_AUX
10
GND
V3-1 3.3V/1.30A
6
7
V3-2
3.3V AUX/275mA
17
V3AUX
V15-1 1.5V/625mA
13
14
V15-2
PLT_RST#(from host)
1
EC_RST#(from host)
2
8 PERST#(to card)
19 PLL_CLKREQ#(to PLL)
EC_CLKREQ#(from card)
20
9
EC_CLKEN#(from host)
●Pin Configration
PLT_RST# 1
EC_RST# 2
SYSR 3
V3_IN1 4
V3_IN2 5
V3_1 6
V3_2 7
PERST# 8
EC_CLKEN# 9
GND 10
SSOP-B20 Package
20 EC_CLKREQ#
19 PLL_CLKREQ#
18 V3AUX_IN1
17 V3AUX
16 V15_IN2
15 V15_IN1
14 V15_2
13 V15_1
12 CPPE#
11 CPUSB#
●Pin Function
PIN No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN NAME
PLT_RST#
EC_RST#
SYSR
V3_IN1
V3_IN2
V3_1
V3_2
PERST#
EC_CLKEN#
GND
CPUSB#
CPPE#
V15_1
V15_2
V15_IN1
V15_IN2
V3AUX
V3AUX_IN
PLL_CLKREQ#
EC_CLKREQ#
PIN FUNCTION
Logic input pin (from HOST)
Logic input pin (from HOST)
Logic input pin
V3 input pin 1
V3 input pin 2
V3 output pin 1
V3 output pin 2
Logic output pin
Logic input pin (from HOST)
GND pin
Logic input pin
Logic input pin
V15 output pin 1
V15 output pin 2
V15 input pin 1
V15 input pin 2
V3AUX output pin
V3AUX input pin 1
Clock enable signal (to PLL)
Logic input pin (from CARD)
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7/16
2010.04 - Rev.B
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