VP310
PRELIMINARY DATA
0
one
byte per
1
position
2
3
4
5
6
7
8
9
10
11
Sync word route
0
17x11 bytes
1
17x10 bytes
2
17x9 bytes
3
17x8 bytes
4
17x7 bytes
5
17x6 bytes
6
17x5 bytes
7
17x4 bytes
8
17x3 bytes
9
17x2 bytes
10
17x1
11
Figure 5. DVB Conceptual diagram of the convolutional de-interleaver block.
1.4.3.2 DSS
Before transmission, the data bytes are interleaved with each other in a cyclic pattern of thirteen.
This ensures the bytes are spaced out to avoid the possibility of a noise spike corrupting a group
of consecutive message bytes. The diagram below shows conceptually how the convolutional de-
interleaving system works. On the VP310, this function is realised in the same Random Access
Memory (RAM) as used for DVB, but utilising different addressing algorithm.
Output
Input
12D
145
0
21
12D
12D
Figure 6. DSS Conceptual diagram of the convolutional de-interleaver block.
9