AD8011AN(2000) 查看數據表（PDF） - Analog Devices
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AD8011AN Datasheet PDF : 16 Pages
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AD8011
where R1 is the input resistance to A2/A2B, and τ1 (equal to
CD × R1 × A2) is the open loop dominate time constant.
and
TO
(s
)
=
|A2|×
2
R1
sτ1 + 1
140
0
120
–40
PHASE
100
–80
80
60
TO(s)
40
GAIN
–120
–160
–200
20
–240
0
1E+03
1E+04
1E+05 1E+06 1E+07
FREQUENCY – Hz
1E+08
–280
1E+09
Figure 31. Open-Loop Transimpedance Gain
Note that the ac open-loop plots in Figures 31, 32 and 33 are
based on the full Spice AD8011 simulations and do not include
external parasitics (see below). Nevertheless, these ac loop equa-
tions still provide a good approximation to simulated and actual
performance up to the CLBW of the amplifier. Typically gmc ×
R1 is –4, resulting in AO(s) having a right half plane pole. In the
time domain (inverse Laplace of AO) it appears as unstable,
causing VO to exponentially rail out of its linear region. When
the loop is closed however, the BW is greatly extended and the
transimpedance gain, TO (s) “overrides” and directly controls
the amplifiers stability behavior due to ZI approaching 1/2 gmf
for s>>1/τ1. See Figure 32. This can be seen by the ZI (s) and
AV (s) noninverting transfer equations below.
ZI
(s) =
(1 –
gmc
×
R1)1 –
Sτ1
gmc ×
R1
2 × gmf (Sτ1 + 1)
+
1
AV(s) =
1 +
G
AO
+
RF
TO
G
Sτ1
2
G
gmf
TO
+
RF
TO
+ 1
400
370
IMPEDANCE
340
20
SERIES 1
0
PHASE
–20
310
–40
280
–60
250
–80
ZI(s)
220
–100
190
–120
160
–140
SERIES 2
130
–160
100
1E+03
1E+04
1E+05 1E+06 1E+07
FREQUENCY – Hz
1E+08
–180
1E+09
Figure 32. Open-Loop Inverting Input Impedance
ZI (s) goes positive real and approaches 1/2 gmf as ω approaches
(gmc × R1 – 1)/τ1. This results in the input resistance for the
AV (s) complex term being 1/2 gmf; the parallel thermal emitter
resistances of Q3/Q4. Using the computed CLBW from AV (s)
above and the nominal design values for the other parameters,
results in a closed loop 3 dB BW equal to the open loop corner
frequency (1/2 πτ1) times 1/[G/(2 gmf × TO) + RF/TO]. For a
fixed RF, the 3 dB BW is controlled by the RF/TO term for low
gains and G/(2 gmf × TO) for high gains. For example, using
nominal design parameters and R1 = 1 kΩ (which results in a
nominal TO of 1.2 MΩ, the computed BW is 80 MHz for G = 0
(inverting I-V mode with RN removed) and 40 MHz for
G = +10/–9.
DRIVING CAPACITIVE LOADS
The AD8011 was designed primarily to drive nonreactive loads.
If driving loads with a capacitive component is desired, best
settling response is obtained by the addition of a small series
resistance as shown in Figure 33. The accompanying graph
shows the optimum value for RSERIES vs. capacitive load. It is
worth noting that the frequency response of the circuit when
driving large capacitive loads will be dominated by the passive
roll-off of RSERIES and CL.
1k⍀
1k⍀
AD8011
RSERIES
RL
1k⍀
CL
Figure 33. Driving Capacitive Load
REV. B
–11–
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