CM106-F 查看數據表（PDF） - C-Media Electronics
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CM106-F Datasheet PDF : 41 Pages
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CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Users can distinguish the source of input report by Byte[0], Byte[1] and Byte[2] consist a word
which may be the content of addressed register or serial EEPROM. It may also be an arbitrary
word programmed by external MCU. In addition, Byte[0] carries the information of HID button
status (MUTE, VDN and VUP), and phone jack sense (HEADPON). VDN/VUP would be 1 when
VOLDN/VOLUP button is pressed, and keeps pressed (VOLDN/VOLUP keeps 0). MUTE would
be 1 when MUTEP button is pressed, and would be cleared to 0 after USB host reads the input
report. HEADPON would be 1 when headphone is plugged in (PHONES is 1).
Refer to the following tables for the definition of internal registers can be accessed via HID
interface:
REG0
Address: 0x00
Reset State: 0x0000
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CSR
Bit
Number
12-0
Bit
Mnemonic
CSR
Read/
Write
R/W
SPDIF out control
Function
REG1
Address: 0x01
Reset State: 0xb000
15
14
13
12
11
10
9
8
DACX2en
FS
PLLBINe
n
SOFTMU
TEen
GPIO4_o
GPIO4_
OEN
GPIO3_o
GPIO3_
OEN
7
GPIO2_o
6
GPIO2_
OEN
5
GPIO1_o
4
GPIO1_
OEN
3
2
1
0
LOWFIR SPDIFLO DIS_SPD SPDIFMI
SET
OP
IFO
X
Bit
Number
15
14
13
12
11
10
9
8
7
Bit
Mnemonic
DACX2en
FS
PLLBINen
SOFTMUTEen
GPIO4_o
GPIO4_OEN
GPIO3_o
GPIO3_OEN
GPIO2_o
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
DAC X 2 enable
ADC full scale setting
PLL binary search enable
Soft mute enable
Gpio4 signal
Gpio4 output enable
Gpio3 signal
Gpio3 output enable
Gpio2 signal
Date: 08/19/2005
- 20 -
Version： 1.01
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